[U-Boot] [PATCH] efi_loader: Always flush in cache line size granularity

[Marek Vasut <marex@denx.de>]

On 04/11/2016 12:31 AM, Alexander Graf wrote:
> 
> 
> On 11.04.16 00:24, Andreas F?rber wrote:
>> Am 04.04.2016 um 09:32 schrieb Alexander Graf:
>>> The cache line flush helpers only work properly when they get aligned
>>> start and end addresses. Round our flush range to cache line size. It's
>>> safe because we're guaranteed to flush within a single page which has the
>>> same cache attributes.
>>>
>>> Reported-by: Marek Vasut <marex@denx.de>
>>> Signed-off-by: Alexander Graf <agraf@suse.de>
>>> ---
>>>  lib/efi_loader/efi_runtime.c | 3 ++-
>>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
>>> index 22bcd08..40acec0 100644
>>> --- a/lib/efi_loader/efi_runtime.c
>>> +++ b/lib/efi_loader/efi_runtime.c
>>> @@ -194,7 +194,8 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map)
>>>  #endif
>>>  
>>>  		*p = newaddr;
>>> -		flush_dcache_range((ulong)p, (ulong)&p[1]);
>>> +		flush_dcache_range((ulong)p & ~(CONFIG_SYS_CACHELINE_SIZE - 1),
>>> +			ALIGN((ulong)&p[1], CONFIG_SYS_CACHELINE_SIZE));
>>
>> dragonboard410c_defconfig fails to build with this due to undefined
>> CONFIG_SYS_CACHELINE_SIZE. Do we need to #ifdef here or is the
>> dragonboard410c at fault for not defining it?
> 
> Some USB drivers use it unconditionally, but I guess the dragonboard401c
> doesn't enable USB.
> 
> Let me come up with a more compatible version.

This version is fine, dragonboard needs fixing. Every single board must
define CONFIG_SYS_CACHELINE_SIZE .

-- 
Best regards,
Marek Vasut