From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Wed, 13 Apr 2016 15:57:40 +0200 Subject: [U-Boot] [PATCH 1/4] spi: cadence_qspi_apb: Support 32 bit AHB address In-Reply-To: <1460544768-32750-2-git-send-email-vigneshr@ti.com> References: <1460544768-32750-1-git-send-email-vigneshr@ti.com> <1460544768-32750-2-git-send-email-vigneshr@ti.com> Message-ID: <570E5054.5060900@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 04/13/2016 12:52 PM, Vignesh R wrote: > AHB address can be as long as 32 bit, hence remove the > CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT > and read as u32 value, it anyway does not make sense to mask upper bits. > > Signed-off-by: Vignesh R > --- > drivers/spi/cadence_qspi_apb.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) Oops, I didn't realize this was for U-Boot. On SoCFPGA SoCkit: Tested-by: Marek Vasut Acked-by: Marek Vasut Best regards, Marek Vasut