[U-Boot] [PATCH V2] dm: gpio: pca953x: introduce driver model support for pca953x

Michal Simek
2016-04-14T12:10:10Z

On 14.4.2016 11:17, Peng Fan wrote:
> Introduce a new driver that supports driver model for pca953x.
> The pca953x chips are used as I2C I/O expanders.
> This driver is designed to support the following chips:
> "
> 4 bits: pca9536, pca9537
> 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
> pca9556, pca9557, pca9574, tca6408, xra1202
> 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575,
> tca6416
> 24 bits: tca6424
> 40 bits: pca9505, pca9698
> "
> But for now this driver only supports max 24 bits and pca953x compatible
> chips. pca957x compatible chips are not supported now.
> These can be addressed when we need to add such support for the different
> chips.
> This driver has been tested on i.MX6 SoloX Sabreauto board with max7310
> i2c expander using gpio command as following:
>
> =>gpio status -a
> Bank gpio at 48_:
> gpio at 48_0: input: 1 [ ]
>
> => dm tree:
> i2c [ ] | | `-- i2c at 021a8000
> gpio [ ] | | |-- gpio at 30
> gpio [ ] | | `-- gpio at 32
>
> Signed-off-by: Peng Fan <van.freenix@gmail.com>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
> Cc: Wenyou Yang <wenyou.yang@atmel.com>
> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
> Cc: Purna Chandra Mandal <purna.mandal@microchip.com>
> Cc: Thomas Chou <thomas@wytron.com.tw>
> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
> Cc: Andrea Scian <andrea.scian@dave.eu>
> Cc: Michal Simek <michal.simek@xilinx.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Acked-by: Simon Glass <sjg@chromium.org>
> ---
>
> V2:
> change bank name according to Simon's comments.
>
> drivers/gpio/Kconfig | 22 +++
> drivers/gpio/Makefile | 2 +
> drivers/gpio/pca953x_gpio.c | 349 ++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 373 insertions(+)
> create mode 100644 drivers/gpio/pca953x_gpio.c
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index 2311309..8ff657c 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -112,4 +112,26 @@ config MVEBU_GPIO
> help
> Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs.
>
> +config DM_PCA953X
> + bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports"
> + depends on DM_GPIO
> + help
> + Say yes here to provide access to several register-oriented
> + SMBus I/O expanders, made mostly by NXP or TI. Compatible
> + models include:
> +
> + 4 bits: pca9536, pca9537
> +
> + 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
> + pca9556, pca9557, pca9574, tca6408, xra1202
> +
> + 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575,
> + tca6416
> +
> + 24 bits: tca6424
> +
> + 40 bits: pca9505, pca9698
> +
> + Now, max 24 bits chips and PCA953X compatible chips are
> + supported
> endmenu
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index ea6e2ed..a7a466c 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -11,6 +11,8 @@ obj-$(CONFIG_AXP_GPIO) += axp_gpio.o
> endif
> obj-$(CONFIG_DM_GPIO) += gpio-uclass.o
>
> +obj-$(CONFIG_DM_PCA953X) += pca953x_gpio.o
> +
> obj-$(CONFIG_AT91_GPIO) += at91_gpio.o
> obj-$(CONFIG_ATMEL_PIO4) += atmel_pio4.o
> obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
> diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c
> new file mode 100644
> index 0000000..ff2aa48
> --- /dev/null
> +++ b/drivers/gpio/pca953x_gpio.c
> @@ -0,0 +1,349 @@
> +/*
> + * Take linux kernel driver drivers/gpio/gpio-pca953x.c for reference.
> + *
> + * Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + *
> + */
> +
> +/*
> + * Note:
> + * The driver's compatible table is borrowed from Linux Kernel,
> + * but now max supported gpio pins is 24 and only PCA953X_TYPE
> + * is supported. PCA957X_TYPE is not supported now.
> + * Also the Polarity Inversion feature is not supported now.
> + *
> + * TODO:
> + * 1. Support PCA957X_TYPE
> + * 2. Support max 40 gpio pins
> + * 3. Support Plolarity Inversion
> + */
> +
> +#include <common.h>
> +#include <errno.h>
> +#include <dm.h>
> +#include <fdtdec.h>
> +#include <i2c.h>
> +#include <malloc.h>
> +#include <asm/gpio.h>
> +#include <asm/io.h>
> +#include <dt-bindings/gpio/gpio.h>
> +
> +#define PCA953X_INPUT 0
> +#define PCA953X_OUTPUT 1
> +#define PCA953X_INVERT 2
> +#define PCA953X_DIRECTION 3
> +
> +#define PCA_GPIO_MASK 0x00FF
> +#define PCA_INT 0x0100
> +#define PCA953X_TYPE 0x1000
> +#define PCA957X_TYPE 0x2000
> +#define PCA_TYPE_MASK 0xF000
> +#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
> +
> +enum {
> + PCA953X_DIRECTION_IN,
> + PCA953X_DIRECTION_OUT,
> +};
> +
> +#define MAX_BANK 3
> +#define BANK_SZ 8
> +
> +/*
> + * struct pca953x_info - Data for pca953x
> + *
> + * @dev: udevice structure for the device
> + * @addr: i2c slave address
> + * @invert: Polarity inversion or not
> + * @gpio_count: the number of gpio pins that the device supports
> + * @chip_type: indicate the chip type,PCA953X or PCA957X
> + * @bank_count: the number of banks that the device supports
> + * @reg_output: array to hold the value of output registers
> + * @reg_direction: array to hold the value of direction registers
> + */
> +struct pca953x_info {
> + struct udevice *dev;
> + unsigned int addr;
> + unsigned int invert;
> + unsigned int gpio_count;
> + unsigned int chip_type;
> + unsigned int bank_count;
> + u8 reg_output[MAX_BANK];
> + u8 reg_direction[MAX_BANK];
> +};
> +
> +static int pca953x_write_single(struct udevice *dev, int reg, u8 val,
> + int offset)
> +{
> + struct pca953x_info *info = dev_get_platdata(dev);
> + int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
> + int off = offset / BANK_SZ;
> + int ret = 0;
> +
> + ret = dm_i2c_write(dev, (reg << bank_shift) + off, &val, 1);
> + if (ret) {
> + dev_err(dev, "%s error\n", __func__);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int pca953x_read_single(struct udevice *dev, int reg, u8 *val,
> + int offset)
> +{
> + struct pca953x_info *info = dev_get_platdata(dev);
> + int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
> + int off = offset / BANK_SZ;
> + int ret;
> + u8 byte;
> +
> + ret = dm_i2c_read(dev, (reg << bank_shift) + off, &byte, 1);
> + if (ret) {
> + dev_err(dev, "%s error\n", __func__);
> + return ret;
> + }
> +
> + *val = byte;
> +
> + return 0;
> +}
> +
> +static int pca953x_read_regs(struct udevice *dev, int reg, u8 *val)
> +{
> + struct pca953x_info *info = dev_get_platdata(dev);
> + int ret = 0;
> +
> + if (info->gpio_count <= 8) {
> + ret = dm_i2c_read(dev, reg, val, 1);
> + } else if (info->gpio_count <= 16) {
> + ret = dm_i2c_read(dev, reg << 1, val, info->bank_count);
> + } else {
> + dev_err(dev, "Unsupported now\n");
> + return -EINVAL;
> + }
> +
> + return ret;
> +}
> +
> +static int pca953x_is_output(struct udevice *dev, int offset)
> +{
> + struct pca953x_info *info = dev_get_platdata(dev);
> +
> + int bank = offset / BANK_SZ;
> + int off = offset % BANK_SZ;
> +
> + /*0: output; 1: input */
> + return !(info->reg_direction[bank] & (1 << off));
> +}
> +
> +static int pca953x_get_value(struct udevice *dev, unsigned offset)
> +{
> + int ret;
> + u8 val = 0;
> +
> + ret = pca953x_read_single(dev, PCA953X_INPUT, &val, offset);
> + if (ret)
> + return ret;
> +
> + return (val >> offset) & 0x1;
> +}
> +
> +static int pca953x_set_value(struct udevice *dev, unsigned offset,
> + int value)
> +{
> + struct pca953x_info *info = dev_get_platdata(dev);
> + int bank = offset / BANK_SZ;
> + int off = offset % BANK_SZ;
> + u8 val;
> + int ret;
> +
> + if (value)
> + val = info->reg_output[bank] | (1 << off);
> + else
> + val = info->reg_output[bank] & ~(1 << off);
> +
> + ret = pca953x_write_single(dev, PCA953X_OUTPUT, val, offset);
> + if (ret)
> + return ret;
> +
> + info->reg_output[bank] = val;
> +
> + return 0;
> +}
> +
> +static int pca953x_set_direction(struct udevice *dev, unsigned offset, int dir)
> +{
> + struct pca953x_info *info = dev_get_platdata(dev);
> + int bank = offset / BANK_SZ;
> + int off = offset % BANK_SZ;
> + u8 val;
> + int ret;
> +
> + if (dir == PCA953X_DIRECTION_IN)
> + val = info->reg_direction[bank] | (1 << off);
> + else
> + val = info->reg_direction[bank] & ~(1 << off);
> +
> + ret = pca953x_write_single(dev, PCA953X_DIRECTION, val, offset);
> + if (ret)
> + return ret;
> +
> + info->reg_direction[bank] = val;
> +
> + return 0;
> +}
> +
> +static int pca953x_direction_input(struct udevice *dev, unsigned offset)
> +{
> + return pca953x_set_direction(dev, offset, PCA953X_DIRECTION_IN);
> +}
> +
> +static int pca953x_direction_output(struct udevice *dev, unsigned offset,
> + int value)
> +{
> + /* Configure output value. */
> + pca953x_set_value(dev, offset, value);
> +
> + /* Configure direction as output. */
> + pca953x_set_direction(dev, offset, PCA953X_DIRECTION_OUT);
> +
> + return 0;
> +}
> +
> +static int pca953x_get_function(struct udevice *dev, unsigned offset)
> +{
> + if (pca953x_is_output(dev, offset))
> + return GPIOF_OUTPUT;
> + else
> + return GPIOF_INPUT;
> +}
> +
> +static int pca953x_xlate(struct udevice *dev, struct gpio_desc *desc,
> + struct fdtdec_phandle_args *args)
> +{
> + desc->offset = args->args[0];
> + desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
> +
> + return 0;
> +}
> +
> +static const struct dm_gpio_ops pca953x_ops = {
> + .direction_input = pca953x_direction_input,
> + .direction_output = pca953x_direction_output,
> + .get_value = pca953x_get_value,
> + .set_value = pca953x_set_value,
> + .get_function = pca953x_get_function,
> + .xlate = pca953x_xlate,
> +};
> +
> +static int pca953x_probe(struct udevice *dev)
> +{
> + struct pca953x_info *info = dev_get_platdata(dev);
> + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
> + struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
> + char name[32], *str;
> + fdt_addr_t addr;
> + ulong driver_data;
> + int ret;
> +
> + if (!info) {
> + dev_err(dev, "platdata not ready\n");
> + return -ENOMEM;
> + }
> +
> + if (!chip) {
> + dev_err(dev, "i2c not ready\n");
> + return -ENODEV;
> + }
> +
> + addr = dev_get_addr(dev);
> + if (addr == FDT_ADDR_T_NONE)
> + return -ENODEV;
> +
> + info->addr = (unsigned int)addr;
> +
> + driver_data = dev_get_driver_data(dev);
> +
> + info->gpio_count = driver_data & PCA_GPIO_MASK;
> + if (info->gpio_count > MAX_BANK * BANK_SZ) {
> + dev_err(dev, "Max support %d pins now\n", MAX_BANK * BANK_SZ);
> + return -EINVAL;
> + }
> +
> + info->chip_type = PCA_CHIP_TYPE(driver_data);
> + if (info->chip_type != PCA953X_TYPE) {
> + dev_err(dev, "Only support PCA953X chip type now.\n");
> + return -EINVAL;
> + }
> +
> + info->bank_count = DIV_ROUND_UP(info->gpio_count, BANK_SZ);
> +
> + ret = pca953x_read_regs(dev, PCA953X_OUTPUT, info->reg_output);
> + if (ret) {
> + dev_err(dev, "Error reading output register\n");
> + return ret;
> + }
> +
> + ret = pca953x_read_regs(dev, PCA953X_DIRECTION, info->reg_direction);
> + if (ret) {
> + dev_err(dev, "Error reading direction register\n");
> + return ret;
> + }
> +
> + snprintf(name, sizeof(name), "gpio@%u_", info->addr);

Can you please use x_ here?

It is weird for checking against dt and I have @32 because of this and
@20(in hex) in DT.

Other than this.

Tested-by: Michal Simek <michal.simek@xilinx.com> #on ZynqMP zcu102

Thanks,
Michal