[U-Boot] [PATCH 10/16] ti_omap5_common: Update SPL start address on secure parts

Tom Rini
2016-04-21T13:39:33Z

On Mon, Apr 11, 2016 at 06:37:12PM -0500, Daniel Allred wrote:

> Updated the CONFIG_SPL_TEXT_BASE to support secure parts (moving
> the start address past secure reserved memory and the size of the
> security certificate that precedes the boot image on secure devices).
> Updated the related CONFIG_SPL_MAX_SIZE to properly reflect the
> internal memory actually available on the various device flavors
> (Common minimum internal RAM guaranteed for various flavors of
> DRA7xx/AM57xx is 512KB).
>
> Signed-off-by: Daniel Allred <d-allred@ti.com>
> Signed-off-by: Madan Srinivas <madans@ti.com>
> ---
> include/configs/ti_omap5_common.h | 32 +++++++++++++++++++++++++++-----
> 1 file changed, 27 insertions(+), 5 deletions(-)
>
> diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h
> index 202b18c..b2d4a0b 100644
> --- a/include/configs/ti_omap5_common.h
> +++ b/include/configs/ti_omap5_common.h
> @@ -132,13 +132,35 @@
>
> /*
> * SPL related defines. The Public RAM memory map the ROM defines the
> - * area between 0x40300000 and 0x4031E000 as a download area for OMAP5
> - * (dra7xx is larger, but we do not need to be larger at this time). We
> - * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and
> + * area between 0x40300000 and 0x4031E000 as a download area for OMAP5.
> + * On DRA7xx/AM57XX the download area is between 0x40300000 and 0x4037E000.
> + * We set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and
> * print some information.
> */
> -#define CONFIG_SPL_TEXT_BASE 0x40300000
> -#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE)
> +#ifdef CONFIG_TI_SECURE_DEVICE
> +/*
> + * For memory booting on HS parts, the first 4KB of the internal RAM is
> + * reserved for secure world use and the flash loader image is
> + * preceded by a secure certificate. The SPL will therefore run in internal
> + * RAM from address 0x40301350 (0x40300000+0x1000(reserved)+0x350(cert)).
> + */
> +#define CONFIG_SECURE_BOOT_SRAM 0x1000

I don't like setting CONFIG_SECURE_BOOT_SRAM as it's not configurable.
I see it's used later in the series but I think we should toggle that on
CONFIG_TI_SECURE_DEVICE and then reference things like
TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ or whatever makes sense.

--
Tom
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