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* [U-Boot] [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue"
@ 2016-04-11  8:53 Zhao Qiang
  2016-04-20 16:57 ` York Sun
  0 siblings, 1 reply; 6+ messages in thread
From: Zhao Qiang @ 2016-04-11  8:53 UTC (permalink / raw)
  To: u-boot

This reverts commit 5066e62847bddf6030262ade2aa3e7bcdc930037.

The reverted patch will block t2080RDB iNiC, it was a workaround for
T2080QDS
down-training issue, we need to revert it and find the root cause for
T2080QDS
down-training issue.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
 drivers/pci/fsl_pci_init.c | 15 ---------------
 include/configs/T208xQDS.h |  1 -
 2 files changed, 16 deletions(-)

diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 52792dc..1143178 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -444,21 +444,6 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)
 			ltssm = (in_be32(&pci->pex_csr0)
 				& PEX_CSR0_LTSSM_MASK) >> PEX_CSR0_LTSSM_SHIFT;
 			enabled = (ltssm == 0x11) ? 1 : 0;
-#ifdef CONFIG_FSL_PCIE_RESET
-			int i;
-			/* assert PCIe reset */
-			setbits_be32(&pci->pdb_stat, 0x08000000);
-			(void) in_be32(&pci->pdb_stat);
-			udelay(1000);
-			/* clear PCIe reset */
-			clrbits_be32(&pci->pdb_stat, 0x08000000);
-			asm("sync;isync");
-			for (i = 0; i < 100 && ltssm < PCI_LTSSM_L0; i++) {
-				pci_hose_read_config_word(hose, dev, PCI_LTSSM,
-							  &ltssm);
-				udelay(1000);
-			}
-#endif
 		} else {
 		/* pci_hose_read_config_word(hose, dev, PCI_LTSSM, &ltssm); */
 		/* enabled = ltssm >= PCI_LTSSM_L0; */
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 5957fa8..c895818 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -559,7 +559,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PCIE2		/* PCIE controler 2 */
 #define CONFIG_PCIE3		/* PCIE controler 3 */
 #define CONFIG_PCIE4		/* PCIE controler 4 */
-#define CONFIG_FSL_PCIE_RESET
 #define CONFIG_FSL_PCI_INIT	/* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
-- 
2.1.0.27.g96db324

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue"
  2016-04-11  8:53 [U-Boot] [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue" Zhao Qiang
@ 2016-04-20 16:57 ` York Sun
  2016-04-21  1:05   ` Qiang Zhao
  0 siblings, 1 reply; 6+ messages in thread
From: York Sun @ 2016-04-20 16:57 UTC (permalink / raw)
  To: u-boot

On 04/11/2016 02:02 AM, Zhao Qiang wrote:
> This reverts commit 5066e62847bddf6030262ade2aa3e7bcdc930037.
> 
> The reverted patch will block t2080RDB iNiC, it was a workaround for
> T2080QDS
> down-training issue, we need to revert it and find the root cause for
> T2080QDS
> down-training issue.

You have a bad wrap-back in commit message.

Does the workaround block anything? Can you revert it after figuring out the
root cause?

York

> 
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> ---
>  drivers/pci/fsl_pci_init.c | 15 ---------------
>  include/configs/T208xQDS.h |  1 -
>  2 files changed, 16 deletions(-)
> 
> diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
> index 52792dc..1143178 100644
> --- a/drivers/pci/fsl_pci_init.c
> +++ b/drivers/pci/fsl_pci_init.c
> @@ -444,21 +444,6 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)
>  			ltssm = (in_be32(&pci->pex_csr0)
>  				& PEX_CSR0_LTSSM_MASK) >> PEX_CSR0_LTSSM_SHIFT;
>  			enabled = (ltssm == 0x11) ? 1 : 0;
> -#ifdef CONFIG_FSL_PCIE_RESET
> -			int i;
> -			/* assert PCIe reset */
> -			setbits_be32(&pci->pdb_stat, 0x08000000);
> -			(void) in_be32(&pci->pdb_stat);
> -			udelay(1000);
> -			/* clear PCIe reset */
> -			clrbits_be32(&pci->pdb_stat, 0x08000000);
> -			asm("sync;isync");
> -			for (i = 0; i < 100 && ltssm < PCI_LTSSM_L0; i++) {
> -				pci_hose_read_config_word(hose, dev, PCI_LTSSM,
> -							  &ltssm);
> -				udelay(1000);
> -			}
> -#endif
>  		} else {
>  		/* pci_hose_read_config_word(hose, dev, PCI_LTSSM, &ltssm); */
>  		/* enabled = ltssm >= PCI_LTSSM_L0; */
> diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
> index 5957fa8..c895818 100644
> --- a/include/configs/T208xQDS.h
> +++ b/include/configs/T208xQDS.h
> @@ -559,7 +559,6 @@ unsigned long get_board_ddr_clk(void);
>  #define CONFIG_PCIE2		/* PCIE controler 2 */
>  #define CONFIG_PCIE3		/* PCIE controler 3 */
>  #define CONFIG_PCIE4		/* PCIE controler 4 */
> -#define CONFIG_FSL_PCIE_RESET
>  #define CONFIG_FSL_PCI_INIT	/* Use common FSL init code */
>  #define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
>  /* controller 1, direct to uli, tgtid 3, Base address 20000 */
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue"
  2016-04-20 16:57 ` York Sun
@ 2016-04-21  1:05   ` Qiang Zhao
  2016-04-21  1:12     ` York Sun
  0 siblings, 1 reply; 6+ messages in thread
From: Qiang Zhao @ 2016-04-21  1:05 UTC (permalink / raw)
  To: u-boot

On 04/21/2016 12:58 AM, York Sun wrote:
> -----Original Message-----
> From: York Sun [mailto:york.sun at nxp.com]
> Sent: Thursday, April 21, 2016 12:58 AM
> To: Qiang Zhao <qiang.zhao@nxp.com>
> Cc: Xiaobo Xie <xiaobo.xie@nxp.com>; u-boot at lists.denx.de
> Subject: Re: [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for
> down-training issue"
> 
> On 04/11/2016 02:02 AM, Zhao Qiang wrote:
> > This reverts commit 5066e62847bddf6030262ade2aa3e7bcdc930037.
> >
> > The reverted patch will block t2080RDB iNiC, it was a workaround for
> > T2080QDS down-training issue, we need to revert it and find the root
> > cause for T2080QDS down-training issue.
> 
> You have a bad wrap-back in commit message.
> 
> Does the workaround block anything? Can you revert it after figuring out the
> root cause?
> 

Yes, it blocks t2080RDB and c29x when using them as iNIC.
If revert it after figuring out the root cause, how about iNIC?
And I am afraid of it is a hard way to find the root cause.

> 
> >
> > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> > ---
> >  drivers/pci/fsl_pci_init.c | 15 ---------------
> > include/configs/T208xQDS.h |  1 -
> >  2 files changed, 16 deletions(-)
> >
> > diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
> > index 52792dc..1143178 100644
> > --- a/drivers/pci/fsl_pci_init.c
> > +++ b/drivers/pci/fsl_pci_init.c
> > @@ -444,21 +444,6 @@ void fsl_pci_init(struct pci_controller *hose, struct
> fsl_pci_info *pci_info)
> >  			ltssm = (in_be32(&pci->pex_csr0)
> >  				& PEX_CSR0_LTSSM_MASK) >>
> PEX_CSR0_LTSSM_SHIFT;
> >  			enabled = (ltssm == 0x11) ? 1 : 0; -#ifdef
> CONFIG_FSL_PCIE_RESET
> > -			int i;
> > -			/* assert PCIe reset */
> > -			setbits_be32(&pci->pdb_stat, 0x08000000);
> > -			(void) in_be32(&pci->pdb_stat);
> > -			udelay(1000);
> > -			/* clear PCIe reset */
> > -			clrbits_be32(&pci->pdb_stat, 0x08000000);
> > -			asm("sync;isync");
> > -			for (i = 0; i < 100 && ltssm < PCI_LTSSM_L0; i++) {
> > -				pci_hose_read_config_word(hose, dev,
> PCI_LTSSM,
> > -							  &ltssm);
> > -				udelay(1000);
> > -			}
> > -#endif
> >  		} else {
> >  		/* pci_hose_read_config_word(hose, dev, PCI_LTSSM, &ltssm);
> */
> >  		/* enabled = ltssm >= PCI_LTSSM_L0; */ diff --git
> > a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index
> > 5957fa8..c895818 100644
> > --- a/include/configs/T208xQDS.h
> > +++ b/include/configs/T208xQDS.h
> > @@ -559,7 +559,6 @@ unsigned long get_board_ddr_clk(void);
> >  #define CONFIG_PCIE2		/* PCIE controler 2 */
> >  #define CONFIG_PCIE3		/* PCIE controler 3 */
> >  #define CONFIG_PCIE4		/* PCIE controler 4 */
> > -#define CONFIG_FSL_PCIE_RESET
> >  #define CONFIG_FSL_PCI_INIT	/* Use common FSL init code */
> >  #define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
> >  /* controller 1, direct to uli, tgtid 3, Base address 20000 */
> >

^ permalink raw reply	[flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue"
  2016-04-21  1:05   ` Qiang Zhao
@ 2016-04-21  1:12     ` York Sun
  2016-07-19 22:04       ` york sun
  0 siblings, 1 reply; 6+ messages in thread
From: York Sun @ 2016-04-21  1:12 UTC (permalink / raw)
  To: u-boot

+Roy to comment on iNIC.

On 04/20/2016 06:05 PM, Qiang Zhao wrote:
> On 04/21/2016 12:58 AM, York Sun wrote:
>> -----Original Message-----
>> From: York Sun [mailto:york.sun at nxp.com]
>> Sent: Thursday, April 21, 2016 12:58 AM
>> To: Qiang Zhao <qiang.zhao@nxp.com>
>> Cc: Xiaobo Xie <xiaobo.xie@nxp.com>; u-boot at lists.denx.de
>> Subject: Re: [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for
>> down-training issue"
>>
>> On 04/11/2016 02:02 AM, Zhao Qiang wrote:
>>> This reverts commit 5066e62847bddf6030262ade2aa3e7bcdc930037.
>>>
>>> The reverted patch will block t2080RDB iNiC, it was a workaround for
>>> T2080QDS down-training issue, we need to revert it and find the root
>>> cause for T2080QDS down-training issue.
>>
>> You have a bad wrap-back in commit message.
>>
>> Does the workaround block anything? Can you revert it after figuring out the
>> root cause?
>>
> 
> Yes, it blocks t2080RDB and c29x when using them as iNIC.
> If revert it after figuring out the root cause, how about iNIC?
> And I am afraid of it is a hard way to find the root cause.
> 

Qiang,

You delete the code gated by CONFIG_FSL_PCIE_RESET, and the macro for T208xQDS.
How does that affect T2080RDB or C29x?

York

^ permalink raw reply	[flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue"
  2016-04-21  1:12     ` York Sun
@ 2016-07-19 22:04       ` york sun
  2016-07-20  1:27         ` Qiang Zhao
  0 siblings, 1 reply; 6+ messages in thread
From: york sun @ 2016-07-19 22:04 UTC (permalink / raw)
  To: u-boot

On 04/20/2016 06:12 PM, York Sun wrote:
> +Roy to comment on iNIC.
>
> On 04/20/2016 06:05 PM, Qiang Zhao wrote:
>> On 04/21/2016 12:58 AM, York Sun wrote:
>>> -----Original Message-----
>>> From: York Sun [mailto:york.sun at nxp.com]
>>> Sent: Thursday, April 21, 2016 12:58 AM
>>> To: Qiang Zhao <qiang.zhao@nxp.com>
>>> Cc: Xiaobo Xie <xiaobo.xie@nxp.com>; u-boot at lists.denx.de
>>> Subject: Re: [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for
>>> down-training issue"
>>>
>>> On 04/11/2016 02:02 AM, Zhao Qiang wrote:
>>>> This reverts commit 5066e62847bddf6030262ade2aa3e7bcdc930037.
>>>>
>>>> The reverted patch will block t2080RDB iNiC, it was a workaround for
>>>> T2080QDS down-training issue, we need to revert it and find the root
>>>> cause for T2080QDS down-training issue.
>>>
>>> You have a bad wrap-back in commit message.
>>>
>>> Does the workaround block anything? Can you revert it after figuring out the
>>> root cause?
>>>
>>
>> Yes, it blocks t2080RDB and c29x when using them as iNIC.
>> If revert it after figuring out the root cause, how about iNIC?
>> And I am afraid of it is a hard way to find the root cause.
>>
>
> Qiang,
>
> You delete the code gated by CONFIG_FSL_PCIE_RESET, and the macro for T208xQDS.
> How does that affect T2080RDB or C29x?
>

Qiang,

Do you have an update? If not, I will defer this patch.

York

^ permalink raw reply	[flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue"
  2016-07-19 22:04       ` york sun
@ 2016-07-20  1:27         ` Qiang Zhao
  0 siblings, 0 replies; 6+ messages in thread
From: Qiang Zhao @ 2016-07-20  1:27 UTC (permalink / raw)
  To: u-boot

On 07/20/2016 06:05 PM, York Sun wrote:
> -----Original Message-----
> From: york sun
> Sent: Wednesday, July 20, 2016 6:05 AM
> To: Qiang Zhao <qiang.zhao@nxp.com>
> Cc: Xiaobo Xie <xiaobo.xie@nxp.com>; u-boot at lists.denx.de; Roy Zang
> <roy.zang@nxp.com>
> Subject: Re: [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for
> down-training issue"
> 
> On 04/20/2016 06:12 PM, York Sun wrote:
> > +Roy to comment on iNIC.
> >
> > On 04/20/2016 06:05 PM, Qiang Zhao wrote:
> >> On 04/21/2016 12:58 AM, York Sun wrote:
> >>> -----Original Message-----
> >>> From: York Sun [mailto:york.sun at nxp.com]
> >>> Sent: Thursday, April 21, 2016 12:58 AM
> >>> To: Qiang Zhao <qiang.zhao@nxp.com>
> >>> Cc: Xiaobo Xie <xiaobo.xie@nxp.com>; u-boot at lists.denx.de
> >>> Subject: Re: [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on
> >>> T2080QDS for down-training issue"
> >>>
> >>> On 04/11/2016 02:02 AM, Zhao Qiang wrote:
> >>>> This reverts commit 5066e62847bddf6030262ade2aa3e7bcdc930037.
> >>>>
> >>>> The reverted patch will block t2080RDB iNiC, it was a workaround
> >>>> for T2080QDS down-training issue, we need to revert it and find the
> >>>> root cause for T2080QDS down-training issue.
> >>>
> >>> You have a bad wrap-back in commit message.
> >>>
> >>> Does the workaround block anything? Can you revert it after figuring
> >>> out the root cause?
> >>>
> >>
> >> Yes, it blocks t2080RDB and c29x when using them as iNIC.
> >> If revert it after figuring out the root cause, how about iNIC?
> >> And I am afraid of it is a hard way to find the root cause.
> >>
> >
> > Qiang,
> >
> > You delete the code gated by CONFIG_FSL_PCIE_RESET, and the macro for
> T208xQDS.
> > How does that affect T2080RDB or C29x?
> >
> 
> Qiang,
> 
> Do you have an update? If not, I will defer this patch.
> 

There is no any update.

-Zhao Qiang

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-07-20  1:27 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-04-11  8:53 [U-Boot] [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue" Zhao Qiang
2016-04-20 16:57 ` York Sun
2016-04-21  1:05   ` Qiang Zhao
2016-04-21  1:12     ` York Sun
2016-07-19 22:04       ` york sun
2016-07-20  1:27         ` Qiang Zhao

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