[U-Boot] [PATCH 46/60] ARM: tegra: add pinmux APIs to replace funcmux

Stephen Warren
2016-04-19T20:59:26Z

From: Stephen Warren <swarren@nvidia.com>

The existing funcmux APIs have the disadvantage that clients call a single
monolithic/IOCTL-style function which performs different operations based
on its parameter. All branches of that function are always compiled into
the binary even when they're not used.

Another disadvantage is that funcmux is pinmux functionality, but
implemented outside the Tegra pinmux driver.

This patch creates a separate function per operation, and implements them
as part of the pinmux driver. Later patches will convert callers to these
functions and eventually remove the funcmux files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/mach-tegra/tegra114/include/mach/pinmux.h | 2 +
arch/arm/mach-tegra/tegra114/pinmux.c | 18 ++
arch/arm/mach-tegra/tegra124/include/mach/pinmux.h | 3 +
arch/arm/mach-tegra/tegra124/pinmux.c | 30 +++
arch/arm/mach-tegra/tegra20/include/mach/pinmux.h | 22 +++
arch/arm/mach-tegra/tegra20/pinmux.c | 208 +++++++++++++++++++++
arch/arm/mach-tegra/tegra30/include/mach/pinmux.h | 2 +
arch/arm/mach-tegra/tegra30/pinmux.c | 12 ++
8 files changed, 297 insertions(+)

diff --git a/arch/arm/mach-tegra/tegra114/include/mach/pinmux.h b/arch/arm/mach-tegra/tegra114/include/mach/pinmux.h
index af2e4be55fdf..8cb07ee751c5 100644
--- a/arch/arm/mach-tegra/tegra114/include/mach/pinmux.h
+++ b/arch/arm/mach-tegra/tegra114/include/mach/pinmux.h
@@ -332,4 +332,6 @@ enum pmux_func {
#define TEGRA_PMX_PINS_HAVE_RCV_SEL
#include <mach/pinmux_common.h>

+void tegra114_pinmux_uartd_gmi(void);
+
#endif
diff --git a/arch/arm/mach-tegra/tegra114/pinmux.c b/arch/arm/mach-tegra/tegra114/pinmux.c
index e4d768637878..7fd383d300ce 100644
--- a/arch/arm/mach-tegra/tegra114/pinmux.c
+++ b/arch/arm/mach-tegra/tegra114/pinmux.c
@@ -291,3 +291,21 @@ static const struct pmux_pingrp_desc tegra114_pingroups[] = {
PIN(RESET_OUT_N, RSVD1, RSVD2, RSVD3, RESET_OUT_N),
};
const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra114_pingroups;
+
+void tegra114_pinmux_uartd_gmi(void)
+{
+ pinmux_set_func(PMUX_PINGRP_GMI_A16_PJ7, PMUX_FUNC_UARTD);
+ pinmux_set_func(PMUX_PINGRP_GMI_A17_PB0, PMUX_FUNC_UARTD);
+ pinmux_set_func(PMUX_PINGRP_GMI_A18_PB1, PMUX_FUNC_UARTD);
+ pinmux_set_func(PMUX_PINGRP_GMI_A19_PK7, PMUX_FUNC_UARTD);
+
+ pinmux_set_io(PMUX_PINGRP_GMI_A16_PJ7, PMUX_PIN_OUTPUT);
+ pinmux_set_io(PMUX_PINGRP_GMI_A17_PB0, PMUX_PIN_INPUT);
+ pinmux_set_io(PMUX_PINGRP_GMI_A18_PB1, PMUX_PIN_INPUT);
+ pinmux_set_io(PMUX_PINGRP_GMI_A19_PK7, PMUX_PIN_OUTPUT);
+
+ pinmux_tristate_disable(PMUX_PINGRP_GMI_A16_PJ7);
+ pinmux_tristate_disable(PMUX_PINGRP_GMI_A17_PB0);
+ pinmux_tristate_disable(PMUX_PINGRP_GMI_A18_PB1);
+ pinmux_tristate_disable(PMUX_PINGRP_GMI_A19_PK7);
+}
diff --git a/arch/arm/mach-tegra/tegra124/include/mach/pinmux.h b/arch/arm/mach-tegra/tegra124/include/mach/pinmux.h
index 4b4424460e5e..307d3f75b728 100644
--- a/arch/arm/mach-tegra/tegra124/include/mach/pinmux.h
+++ b/arch/arm/mach-tegra/tegra124/include/mach/pinmux.h
@@ -363,4 +363,7 @@ enum pmux_func {
#define TEGRA_PMX_PINS_HAVE_RCV_SEL
#include <mach/pinmux_common.h>

+void tegra124_pinmux_uarta_kbc(void);
+void tegra124_pinmux_uartd_gpio(void);
+
#endif
diff --git a/arch/arm/mach-tegra/tegra124/pinmux.c b/arch/arm/mach-tegra/tegra124/pinmux.c
index d5b4cdb9a686..b27f89e2f5a1 100644
--- a/arch/arm/mach-tegra/tegra124/pinmux.c
+++ b/arch/arm/mach-tegra/tegra124/pinmux.c
@@ -321,3 +321,33 @@ static const struct pmux_mipipadctrlgrp_desc tegra124_mipipadctrl_groups[] = {
MIPIPADCTRL_GRP(DSI_B, CSI, DSI_B),
};
const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups = tegra124_mipipadctrl_groups;
+
+void tegra124_pinmux_uarta_kbc(void)
+{
+ pinmux_set_func(PMUX_PINGRP_KB_ROW9_PS1, PMUX_FUNC_UARTA);
+ pinmux_set_func(PMUX_PINGRP_KB_ROW10_PS2, PMUX_FUNC_UARTA);
+
+ pinmux_set_io(PMUX_PINGRP_KB_ROW9_PS1, PMUX_PIN_OUTPUT);
+ pinmux_set_io(PMUX_PINGRP_KB_ROW10_PS2, PMUX_PIN_INPUT);
+
+ pinmux_tristate_disable(PMUX_PINGRP_KB_ROW9_PS1);
+ pinmux_tristate_disable(PMUX_PINGRP_KB_ROW10_PS2);
+}
+
+void tegra124_pinmux_uartd_gpio(void)
+{
+ pinmux_set_func(PMUX_PINGRP_PJ7, PMUX_FUNC_UARTD);
+ pinmux_set_func(PMUX_PINGRP_PB0, PMUX_FUNC_UARTD);
+ pinmux_set_func(PMUX_PINGRP_PB1, PMUX_FUNC_UARTD);
+ pinmux_set_func(PMUX_PINGRP_PK7, PMUX_FUNC_UARTD);
+
+ pinmux_set_io(PMUX_PINGRP_PJ7, PMUX_PIN_OUTPUT);
+ pinmux_set_io(PMUX_PINGRP_PB0, PMUX_PIN_INPUT);
+ pinmux_set_io(PMUX_PINGRP_PB1, PMUX_PIN_INPUT);
+ pinmux_set_io(PMUX_PINGRP_PK7, PMUX_PIN_OUTPUT);
+
+ pinmux_tristate_disable(PMUX_PINGRP_PJ7);
+ pinmux_tristate_disable(PMUX_PINGRP_PB0);
+ pinmux_tristate_disable(PMUX_PINGRP_PB1);
+ pinmux_tristate_disable(PMUX_PINGRP_PK7);
+}
diff --git a/arch/arm/mach-tegra/tegra20/include/mach/pinmux.h b/arch/arm/mach-tegra/tegra20/include/mach/pinmux.h
index f05e993b34cc..642f9d59d588 100644
--- a/arch/arm/mach-tegra/tegra20/include/mach/pinmux.h
+++ b/arch/arm/mach-tegra/tegra20/include/mach/pinmux.h
@@ -236,4 +236,26 @@ enum pmux_func {
#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868
#include <mach/pinmux_common.h>

+void tegra20_pinmux_disp1_ld0_17(void);
+void tegra20_pinmux_dvc_i2c_i2cp(void);
+void tegra20_pinmux_i2c1_rm(void);
+void tegra20_pinmux_i2c3_dtf(void);
+void tegra20_pinmux_kbc_kbca_f(void);
+void tegra20_pinmux_ndflash_atc(void);
+void tegra20_pinmux_ndflash_kbc_8bit(void);
+void tegra20_pinmux_sdmmc1_sdio1_4bit(void);
+void tegra20_pinmux_sdmmc2_dta_dtd_8bit(void);
+void tegra20_pinmux_sdmmc3_sdb_4bit(void);
+void tegra20_pinmux_sdmmc3_sdb_slxa_8bit(void);
+void tegra20_pinmux_sdmmc4_atb_gma_4bit(void);
+void tegra20_pinmux_sdmmc4_atb_gma_gme_8bit(void);
+void tegra20_pinmux_sdmmc4_atc_atd_8bit(void);
+void tegra20_pinmux_spi1_gmc_gmd(void);
+void tegra20_pinmux_uarta_gpu(void);
+void tegra20_pinmux_uarta_irrx_irtx(void);
+void tegra20_pinmux_uarta_sdio1(void);
+void tegra20_pinmux_uarta_uaa_uab(void);
+void tegra20_pinmux_uartd_gmc(void);
+void tegra20_pinmux_usb2_ulpi(void);
+
#endif
diff --git a/arch/arm/mach-tegra/tegra20/pinmux.c b/arch/arm/mach-tegra/tegra20/pinmux.c
index bfcef743a998..363b72f37880 100644
--- a/arch/arm/mach-tegra/tegra20/pinmux.c
+++ b/arch/arm/mach-tegra/tegra20/pinmux.c
@@ -424,3 +424,211 @@ static const struct pmux_pingrp_desc tegra20_pingroups[] = {
DRVGRP(XM2D),
};
const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra20_pingroups;
+
+#define PINMUX(grp, mux, pupd, tri) \
+ {PMUX_PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri}
+
+static const struct pmux_pingrp_config disp1_default[] = {
+ PINMUX(LDI, DISPA, NORMAL, NORMAL),
+ PINMUX(LHP0, DISPA, NORMAL, NORMAL),
+ PINMUX(LHP1, DISPA, NORMAL, NORMAL),
+ PINMUX(LHP2, DISPA, NORMAL, NORMAL),
+ PINMUX(LHS, DISPA, NORMAL, NORMAL),
+ PINMUX(LM0, RSVD4, NORMAL, NORMAL),
+ PINMUX(LPP, DISPA, NORMAL, NORMAL),
+ PINMUX(LPW0, DISPA, NORMAL, NORMAL),
+ PINMUX(LPW2, DISPA, NORMAL, NORMAL),
+ PINMUX(LSC0, DISPA, NORMAL, NORMAL),
+ PINMUX(LSPI, DISPA, NORMAL, NORMAL),
+ PINMUX(LVP1, DISPA, NORMAL, NORMAL),
+ PINMUX(LVS, DISPA, NORMAL, NORMAL),
+ PINMUX(SLXD, SPDIF, NORMAL, NORMAL),
+};
+
+void tegra20_pinmux_disp1_ld0_17(void)
+{
+ int i;
+
+ for (i = PMUX_PINGRP_LD0; i <= PMUX_PINGRP_LD17; i++) {
+ pinmux_set_func(i, PMUX_FUNC_DISPA);
+ pinmux_tristate_disable(i);
+ pinmux_set_pullupdown(i, PMUX_PULL_NORMAL);
+ }
+ pinmux_config_pingrp_table(disp1_default, ARRAY_SIZE(disp1_default));
+}
+
+void tegra20_pinmux_dvc_i2c_i2cp(void)
+{
+ pinmux_set_func(PMUX_PINGRP_I2CP, PMUX_FUNC_I2C);
+ pinmux_tristate_disable(PMUX_PINGRP_I2CP);
+}
+
+void tegra20_pinmux_i2c1_rm(void)
+{
+ pinmux_set_func(PMUX_PINGRP_RM, PMUX_FUNC_I2C);
+ pinmux_tristate_disable(PMUX_PINGRP_RM);
+}
+
+void tegra20_pinmux_i2c3_dtf(void)
+{
+ pinmux_set_func(PMUX_PINGRP_DTF, PMUX_FUNC_I2C3);
+ pinmux_tristate_disable(PMUX_PINGRP_DTF);
+}
+
+void tegra20_pinmux_kbc_kbca_f(void)
+{
+ enum pmux_pingrp grp[] = {PMUX_PINGRP_KBCA, PMUX_PINGRP_KBCB,
+ PMUX_PINGRP_KBCC, PMUX_PINGRP_KBCD, PMUX_PINGRP_KBCE,
+ PMUX_PINGRP_KBCF};
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(grp); i++) {
+ pinmux_tristate_disable(grp[i]);
+ pinmux_set_func(grp[i], PMUX_FUNC_KBC);
+ pinmux_set_pullupdown(grp[i], PMUX_PULL_UP);
+ }
+}
+
+void tegra20_pinmux_ndflash_atc(void)
+{
+ pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_NAND);
+ pinmux_tristate_disable(PMUX_PINGRP_ATC);
+}
+
+void tegra20_pinmux_ndflash_kbc_8bit(void)
+{
+ pinmux_set_func(PMUX_PINGRP_KBCA, PMUX_FUNC_NAND);
+ pinmux_set_func(PMUX_PINGRP_KBCB, PMUX_FUNC_NAND);
+ pinmux_set_func(PMUX_PINGRP_KBCC, PMUX_FUNC_NAND);
+ pinmux_set_func(PMUX_PINGRP_KBCD, PMUX_FUNC_NAND);
+ pinmux_set_func(PMUX_PINGRP_KBCE, PMUX_FUNC_NAND);
+ pinmux_set_func(PMUX_PINGRP_KBCF, PMUX_FUNC_NAND);
+ pinmux_tristate_disable(PMUX_PINGRP_KBCA);
+ pinmux_tristate_disable(PMUX_PINGRP_KBCB);
+ pinmux_tristate_disable(PMUX_PINGRP_KBCC);
+ pinmux_tristate_disable(PMUX_PINGRP_KBCD);
+ pinmux_tristate_disable(PMUX_PINGRP_KBCE);
+ pinmux_tristate_disable(PMUX_PINGRP_KBCF);
+}
+
+void tegra20_pinmux_sdmmc1_sdio1_4bit(void)
+{
+ pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1);
+ pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
+}
+
+void tegra20_pinmux_sdmmc2_dta_dtd_8bit(void)
+{
+ pinmux_set_func(PMUX_PINGRP_DTA, PMUX_FUNC_SDIO2);
+ pinmux_set_func(PMUX_PINGRP_DTD, PMUX_FUNC_SDIO2);
+ pinmux_tristate_disable(PMUX_PINGRP_DTA);
+ pinmux_tristate_disable(PMUX_PINGRP_DTD);
+}
+
+void tegra20_pinmux_sdmmc3_sdb_4bit(void)
+{
+ pinmux_set_func(PMUX_PINGRP_SDB, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PMUX_PINGRP_SDD, PMUX_FUNC_SDIO3);
+ pinmux_tristate_disable(PMUX_PINGRP_SDB);
+ pinmux_tristate_disable(PMUX_PINGRP_SDC);
+ pinmux_tristate_disable(PMUX_PINGRP_SDD);
+}
+
+void tegra20_pinmux_sdmmc3_sdb_slxa_8bit(void)
+{
+ pinmux_set_func(PMUX_PINGRP_SLXA, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PMUX_PINGRP_SLXC, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PMUX_PINGRP_SLXD, PMUX_FUNC_SDIO3);
+ pinmux_set_func(PMUX_PINGRP_SLXK, PMUX_FUNC_SDIO3);
+ pinmux_tristate_disable(PMUX_PINGRP_SLXA);
+ pinmux_tristate_disable(PMUX_PINGRP_SLXC);
+ pinmux_tristate_disable(PMUX_PINGRP_SLXD);
+ pinmux_tristate_disable(PMUX_PINGRP_SLXK);
+ tegra20_pinmux_sdmmc3_sdb_4bit();
+}
+
+void tegra20_pinmux_sdmmc4_atb_gma_4bit(void)
+{
+ pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4);
+ pinmux_tristate_disable(PMUX_PINGRP_ATB);
+ pinmux_tristate_disable(PMUX_PINGRP_GMA);
+}
+
+void tegra20_pinmux_sdmmc4_atb_gma_gme_8bit(void)
+{
+ pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4);
+ pinmux_tristate_disable(PMUX_PINGRP_GME);
+ tegra20_pinmux_sdmmc4_atb_gma_4bit();
+}
+
+void tegra20_pinmux_sdmmc4_atc_atd_8bit(void)
+{
+ pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PMUX_PINGRP_ATD, PMUX_FUNC_SDIO4);
+ pinmux_tristate_disable(PMUX_PINGRP_ATC);
+ pinmux_tristate_disable(PMUX_PINGRP_ATD);
+}
+
+void tegra20_pinmux_spi1_gmc_gmd(void)
+{
+ pinmux_set_func(PMUX_PINGRP_GMC, PMUX_FUNC_SFLASH);
+ pinmux_set_func(PMUX_PINGRP_GMD, PMUX_FUNC_SFLASH);
+ pinmux_tristate_disable(PMUX_PINGRP_GMC);
+ pinmux_tristate_disable(PMUX_PINGRP_GMD);
+}
+
+static void tegra20_pinmux_uarta_fix_sdb_conflict(void)
+{
+ pinmux_tristate_enable(PMUX_PINGRP_SDB);
+ pinmux_set_func(PMUX_PINGRP_SDB, PMUX_FUNC_SDIO3);
+}
+
+void tegra20_pinmux_uarta_gpu(void)
+{
+ pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_UARTA);
+ pinmux_tristate_disable(PMUX_PINGRP_GPU);
+ tegra20_pinmux_uarta_fix_sdb_conflict();
+}
+
+void tegra20_pinmux_uarta_irrx_irtx(void)
+{
+ pinmux_set_func(PMUX_PINGRP_IRRX, PMUX_FUNC_UARTA);
+ pinmux_set_func(PMUX_PINGRP_IRTX, PMUX_FUNC_UARTA);
+ pinmux_tristate_disable(PMUX_PINGRP_IRRX);
+ pinmux_tristate_disable(PMUX_PINGRP_IRTX);
+ tegra20_pinmux_uarta_fix_sdb_conflict();
+}
+
+void tegra20_pinmux_uarta_sdio1(void)
+{
+ pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_UARTA);
+ pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
+ tegra20_pinmux_uarta_fix_sdb_conflict();
+}
+
+void tegra20_pinmux_uarta_uaa_uab(void)
+{
+ pinmux_set_func(PMUX_PINGRP_UAA, PMUX_FUNC_UARTA);
+ pinmux_set_func(PMUX_PINGRP_UAB, PMUX_FUNC_UARTA);
+ pinmux_tristate_disable(PMUX_PINGRP_UAA);
+ pinmux_tristate_disable(PMUX_PINGRP_UAB);
+ tegra20_pinmux_uarta_fix_sdb_conflict();
+}
+
+void tegra20_pinmux_uartd_gmc(void)
+{
+ pinmux_set_func(PMUX_PINGRP_GMC, PMUX_FUNC_UARTD);
+ pinmux_tristate_disable(PMUX_PINGRP_GMC);
+}
+
+void tegra20_pinmux_usb2_ulpi(void)
+{
+ pinmux_set_func(PMUX_PINGRP_UAA, PMUX_FUNC_ULPI);
+ pinmux_set_func(PMUX_PINGRP_UAB, PMUX_FUNC_ULPI);
+ pinmux_set_func(PMUX_PINGRP_UDA, PMUX_FUNC_ULPI);
+ pinmux_tristate_disable(PMUX_PINGRP_UAA);
+ pinmux_tristate_disable(PMUX_PINGRP_UAB);
+ pinmux_tristate_disable(PMUX_PINGRP_UDA);
+}
diff --git a/arch/arm/mach-tegra/tegra30/include/mach/pinmux.h b/arch/arm/mach-tegra/tegra30/include/mach/pinmux.h
index 7717370f00eb..2588a38336be 100644
--- a/arch/arm/mach-tegra/tegra30/include/mach/pinmux.h
+++ b/arch/arm/mach-tegra/tegra30/include/mach/pinmux.h
@@ -408,4 +408,6 @@ enum pmux_func {
#define TEGRA_PMX_PINS_HAVE_IO_RESET
#include <mach/pinmux_common.h>

+void tegra30_pinmux_uarta_ulpi(void);
+
#endif
diff --git a/arch/arm/mach-tegra/tegra30/pinmux.c b/arch/arm/mach-tegra/tegra30/pinmux.c
index fd1f9464a014..2331d2bcdd52 100644
--- a/arch/arm/mach-tegra/tegra30/pinmux.c
+++ b/arch/arm/mach-tegra/tegra30/pinmux.c
@@ -274,3 +274,15 @@ static const struct pmux_pingrp_desc tegra30_pingroups[] = {
PIN(HDMI_CEC_PEE3, CEC, RSVD2, RSVD3, RSVD4),
};
const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra30_pingroups;
+
+void tegra30_pinmux_uarta_ulpi(void)
+{
+ pinmux_set_func(PMUX_PINGRP_ULPI_DATA0_PO1, PMUX_FUNC_UARTA);
+ pinmux_set_func(PMUX_PINGRP_ULPI_DATA1_PO2, PMUX_FUNC_UARTA);
+ pinmux_set_func(PMUX_PINGRP_ULPI_DATA2_PO3, PMUX_FUNC_UARTA);
+ pinmux_set_func(PMUX_PINGRP_ULPI_DATA3_PO4, PMUX_FUNC_UARTA);
+ pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA0_PO1);
+ pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA1_PO2);
+ pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA2_PO3);
+ pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA3_PO4);
+}
--
2.8.1