[U-Boot] [PATCH 52/60] ARM: tegra: convert pin_mux_*() to new hooks

Stephen Warren
2016-04-19T20:59:32Z

From: Stephen Warren <swarren@nvidia.com>

Implementations of the following functions are converted to use the new
standardized hooks: pin_mux_usb, pin_mux_spi, pin_mux_nand, pin_mux_mmc,
pin_mux_display. This simplifies the core board files.

For some boards, function sort order was changed so that functions appear
in they order they're called.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/mach-tegra/board2.c | 36 ----------
arch/arm/mach-tegra/include/mach/board.h | 13 ----
board/avionic-design/common/tamonten-ng.c | 11 ++-
board/avionic-design/common/tamonten.c | 9 ---
board/compal/paz00/paz00.c | 25 +------
board/compulab/trimslice/trimslice.c | 17 +----
board/nvidia/cardhu/cardhu.c | 18 ++---
board/nvidia/dalmore/dalmore.c | 18 ++---
board/nvidia/e2220-1170/e2220-1170.c | 26 +++----
board/nvidia/harmony/harmony.c | 33 +++------
board/nvidia/p2371-0000/p2371-0000.c | 26 +++----
board/nvidia/p2371-2180/p2371-2180.c | 26 +++----
board/nvidia/p2571/p2571.c | 26 +++----
board/nvidia/seaboard/seaboard.c | 18 ++---
board/nvidia/whistler/whistler.c | 57 +++++++--------
board/toradex/colibri_t20/colibri_t20.c | 114 +++++++++++-------------------
board/toradex/colibri_t30/colibri_t30.c | 8 +--
17 files changed, 161 insertions(+), 320 deletions(-)

diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index fb58b5e5986a..d9dfb01fdcfc 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -32,17 +32,6 @@

DECLARE_GLOBAL_DATA_PTR;

-__weak void pin_mux_usb(void) {}
-__weak void pin_mux_spi(void) {}
-__weak void pin_mux_display(void) {}
-
-#if defined(CONFIG_TEGRA_NAND)
-__weak void pin_mux_nand(void)
-{
- funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
-}
-#endif
-
/*
* Routine: power_det_init
* Description: turn off power detects
@@ -102,14 +91,6 @@ int board_init(void)

tegra_gpu_config();

-#ifdef CONFIG_TEGRA_SPI
- pin_mux_spi();
-#endif
-
- /* Init is handled automatically in the driver-model case */
-#if defined(CONFIG_DM_VIDEO)
- pin_mux_display();
-#endif
/* boot param addr */
gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);

@@ -132,10 +113,6 @@ int board_init(void)
#endif
#endif /* CONFIG_SYS_I2C_TEGRA */

-#ifdef CONFIG_USB_EHCI_TEGRA
- pin_mux_usb();
-#endif
-
#if defined(CONFIG_DM_VIDEO)
board_id = tegra_board_id();
err = tegra_lcd_pmic_init(board_id);
@@ -143,10 +120,6 @@ int board_init(void)
return err;
#endif

-#ifdef CONFIG_TEGRA_NAND
- pin_mux_nand();
-#endif
-
tegra_xusb_padctl_init(gd->fdt_blob);

#ifdef CONFIG_TEGRA_LP0
@@ -201,19 +174,10 @@ int board_late_init(void)
}

#if defined(CONFIG_TEGRA_MMC)
-__weak void pin_mux_mmc(void)
-{
-}
-
/* this is a weak define that we are overriding */
int board_mmc_init(bd_t *bd)
{
debug("%s called\n", __func__);
-
- /* Enable muxes, etc. for SDMMC controllers */
- pin_mux_mmc();
-
- debug("%s: init MMC\n", __func__);
tegra_mmc_init();

return 0;
diff --git a/arch/arm/mach-tegra/include/mach/board.h b/arch/arm/mach-tegra/include/mach/board.h
index a621f37aa38a..04fabeaca3c9 100644
--- a/arch/arm/mach-tegra/include/mach/board.h
+++ b/arch/arm/mach-tegra/include/mach/board.h
@@ -8,19 +8,6 @@
#ifndef _MACH_BOARD_H
#define _MACH_BOARD_H

-/*
- * Hooks to allow boards to set up the pinmux for a specific function.
- * Has to be implemented in the board files as we don't yet support pinmux
- * setup from FTD. If a board file does not implement one of those functions
- * an empty stub function will be called.
- */
-
-void pin_mux_usb(void); /* overridable USB pinmux setup */
-void pin_mux_spi(void); /* overridable SPI pinmux setup */
-void pin_mux_nand(void); /* overridable NAND pinmux setup */
-void pin_mux_mmc(void); /* overridable mmc pinmux setup */
-void pin_mux_display(void); /* overridable DISPLAY pinmux setup */
-
/**
* tegra_lcd_pmic_init() - Set up the PMIC for a board
*
diff --git a/board/avionic-design/common/tamonten-ng.c b/board/avionic-design/common/tamonten-ng.c
index 695d0e714461..7c3aa7e16d9c 100644
--- a/board/avionic-design/common/tamonten-ng.c
+++ b/board/avionic-design/common/tamonten-ng.c
@@ -62,7 +62,7 @@ void tegra_board_early_init_f(void)
gpio_direction_output(TEGRA_GPIO(I, 4), 1);
}

-void pmu_write(uchar reg, uchar data)
+static void pmu_write(uchar reg, uchar data)
{
struct udevice *dev;
int ret;
@@ -79,7 +79,7 @@ void pmu_write(uchar reg, uchar data)
* Do I2C/PMU writes to bring up SD card bus power
*
*/
-void board_sdmmc_voltage_init(void)
+static void board_sdmmc_voltage_init(void)
{
/* Enable LDO5 with 3.3v for SDMMC3 */
pmu_write(PMU_REG_LDO5, PMU_LDO5(HIGH_POWER, 3300));
@@ -89,11 +89,7 @@ void board_sdmmc_voltage_init(void)
gpio_direction_output(TEGRA_GPIO(J, 2), 1);
}

-/*
- * Routine: pin_mux_mmc
- * Description: setup the MMC muxes, power rails, etc.
- */
-void pin_mux_mmc(void)
+int tegra_board_init(void)
{
/*
* NOTE: We don't do mmc-specific pin muxes here.
@@ -102,4 +98,5 @@ void pin_mux_mmc(void)

/* Bring up the SDIO1 power rail */
board_sdmmc_voltage_init();
+ return 0;
}
diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c
index 0b1ed37c8b52..4727ebdc72c8 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
@@ -31,19 +31,10 @@ void tegra_board_early_init_f(void)
{
gpio_request(TEGRA_GPIO(I, 4), NULL);
gpio_direction_output(TEGRA_GPIO(I, 4), 1);
-}

-#ifdef CONFIG_TEGRA_MMC
-/*
- * Routine: pin_mux_mmc
- * Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-void pin_mux_mmc(void)
-{
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
/* for write-protect GPIO PI6 */
pinmux_tristate_disable(PMUX_PINGRP_ATA);
/* for CD GPIO PH2 */
pinmux_tristate_disable(PMUX_PINGRP_ATD);
}
-#endif
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
index e591af4f7b78..562a4df1f262 100644
--- a/board/compal/paz00/paz00.c
+++ b/board/compal/paz00/paz00.c
@@ -21,41 +21,22 @@ void tegra_spl_board_init(void)
tegra_spl_setup_uart(TEGRA_SPL_UART_A);
}

-#ifdef CONFIG_TEGRA_MMC
-/*
- * Routine: pin_mux_mmc
- * Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-void pin_mux_mmc(void)
+void tegra_board_early_init_f(void)
{
+ /* EN_VDD_PANEL GPIO A4 */
+ pinmux_tristate_disable(PMUX_PINGRP_DAP2);
/* SDMMC4: config 3, x8 on 2nd set of pins */
pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4);
pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4);
pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4);
-
pinmux_tristate_disable(PMUX_PINGRP_ATB);
pinmux_tristate_disable(PMUX_PINGRP_GMA);
pinmux_tristate_disable(PMUX_PINGRP_GME);
-
/* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1);
-
pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
-
/* For power GPIO PV1 */
pinmux_tristate_disable(PMUX_PINGRP_UAC);
/* For CD GPIO PV5 */
pinmux_tristate_disable(PMUX_PINGRP_GPV);
}
-#endif
-
-#ifdef CONFIG_DM_VIDEO
-/* this is a weak define that we are overriding */
-void pin_mux_display(void)
-{
- debug("init display pinmux\n");
-
- /* EN_VDD_PANEL GPIO A4 */
- pinmux_tristate_disable(PMUX_PINGRP_DAP2);
-}
-#endif
diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c
index 3fd10b2be4aa..775343e338b5 100644
--- a/board/compulab/trimslice/trimslice.c
+++ b/board/compulab/trimslice/trimslice.c
@@ -22,29 +22,16 @@ void tegra_spl_board_init(void)
tegra_spl_setup_uart(TEGRA_SPL_UART_A);
}

-void pin_mux_usb(void)
+void tegra_board_early_init_f(void)
{
+ tegra20_pinmux_spi1_gmc_gmd();
/*
* USB1 internal/external mux GPIO, which masquerades as a VBUS GPIO
* in the current device tree.
*/
pinmux_tristate_disable(PMUX_PINGRP_UAC);
-}
-
-void pin_mux_spi(void)
-{
- funcmux_select(PERIPH_ID_SPI1, FUNCMUX_SPI1_GMC_GMD);
-}
-
-/*
- * Routine: pin_mux_mmc
- * Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-void pin_mux_mmc(void)
-{
funcmux_select(PERIPH_ID_SDMMC1, FUNCMUX_SDMMC1_SDIO1_4BIT);
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
-
/* For CD GPIO PP1 */
pinmux_tristate_disable(PMUX_PINGRP_DAP3);
}
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
index f5c04b45664f..ec6af06bf1b5 100644
--- a/board/nvidia/cardhu/cardhu.c
+++ b/board/nvidia/cardhu/cardhu.c
@@ -39,7 +39,7 @@ void tegra_board_early_init_f(void)
* Do I2C/PMU writes to bring up SD card bus power
*
*/
-void board_sdmmc_voltage_init(void)
+static void board_sdmmc_voltage_init(void)
{
struct udevice *dev;
uchar reg, data_buffer[1];
@@ -70,22 +70,16 @@ void board_sdmmc_voltage_init(void)
udelay(100);
}
}
+#else
+static void board_sdmmc_voltage_init(void) {}
+#endif

-/*
- * Routine: pin_mux_mmc
- * Description: setup the MMC muxes, power rails, etc.
- */
-void pin_mux_mmc(void)
+int tegra_board_init(void)
{
- /*
- * NOTE: We don't do mmc-specific pin muxes here.
- * They were done globally in tegra_board_early_init_f().
- */
-
/* Bring up the SDIO1 power rail */
board_sdmmc_voltage_init();
+ return 0;
}
-#endif /* MMC */

#ifdef CONFIG_PCI_TEGRA
int tegra_pcie_board_init(void)
diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index 3af42fa79ff2..309e1933fe74 100644
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -39,7 +39,7 @@ void tegra_board_early_init_f(void)
* Do I2C/PMU writes to bring up SD card bus power
*
*/
-void board_sdmmc_voltage_init(void)
+static void board_sdmmc_voltage_init(void)
{
struct udevice *dev;
uchar reg, data_buffer[1];
@@ -83,19 +83,13 @@ void board_sdmmc_voltage_init(void)
printf("%s: BAT i2c_write %02X<-%02X returned %d\n",
__func__, reg, data_buffer[0], ret);
}
+#else
+static void board_sdmmc_voltage_init(void) {}
+#endif

-/*
- * Routine: pin_mux_mmc
- * Description: setup the MMC muxes, power rails, etc.
- */
-void pin_mux_mmc(void)
+int tegra_board_init(void)
{
- /*
- * NOTE: We don't do mmc-specific pin muxes here.
- * They were done globally in tegra_board_early_init_f().
- */
-
/* Bring up the SDIO3 power rail */
board_sdmmc_voltage_init();
+ return 0;
}
-#endif /* MMC */
diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c
index 9ccdc28b0b32..2c5ca4089a81 100644
--- a/board/nvidia/e2220-1170/e2220-1170.c
+++ b/board/nvidia/e2220-1170/e2220-1170.c
@@ -15,7 +15,18 @@
#include "../p2571/max77620_init.h"
#include "pinmux-config-e2220-1170.h"

-void pin_mux_mmc(void)
+void tegra_board_early_init_f(void)
+{
+ pinmux_clear_tristate_input_clamping();
+ gpio_config_table(e2220_1170_gpio_inits,
+ ARRAY_SIZE(e2220_1170_gpio_inits));
+ pinmux_config_pingrp_table(e2220_1170_pingrps,
+ ARRAY_SIZE(e2220_1170_pingrps));
+ pinmux_config_drvgrp_table(e2220_1170_drvgrps,
+ ARRAY_SIZE(e2220_1170_drvgrps));
+}
+
+int tegra_board_init(void)
{
struct udevice *dev;
uchar val;
@@ -26,22 +37,13 @@ void pin_mux_mmc(void)
ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
if (ret) {
printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
- return;
+ return -1;
}
/* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
val = 0xF2;
ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
-}

-void tegra_board_early_init_f(void)
-{
- pinmux_clear_tristate_input_clamping();
- gpio_config_table(e2220_1170_gpio_inits,
- ARRAY_SIZE(e2220_1170_gpio_inits));
- pinmux_config_pingrp_table(e2220_1170_pingrps,
- ARRAY_SIZE(e2220_1170_pingrps));
- pinmux_config_drvgrp_table(e2220_1170_drvgrps,
- ARRAY_SIZE(e2220_1170_drvgrps));
+ return 0;
}
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
index 0139a2fdb239..9429b3b70cc4 100644
--- a/board/nvidia/harmony/harmony.c
+++ b/board/nvidia/harmony/harmony.c
@@ -22,39 +22,24 @@ void tegra_spl_board_init(void)
tegra_spl_setup_uart(TEGRA_SPL_UART_D);
}

-#ifdef CONFIG_TEGRA_MMC
-/*
- * Routine: pin_mux_mmc
- * Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-void pin_mux_mmc(void)
+void tegra_board_early_init_f(void)
{
+ pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
+ pinmux_tristate_disable(PMUX_PINGRP_SDC);
+ funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
+ pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
+ pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
+ /* USB2 PHY reset GPIO */
+ pinmux_tristate_disable(PMUX_PINGRP_UAC);
+ funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT);
-
/* For power GPIO PI6 */
pinmux_tristate_disable(PMUX_PINGRP_ATA);
/* For CD GPIO PH2 */
pinmux_tristate_disable(PMUX_PINGRP_ATD);
-
/* For power GPIO PT3 */
pinmux_tristate_disable(PMUX_PINGRP_DTB);
/* For CD GPIO PI5 */
pinmux_tristate_disable(PMUX_PINGRP_ATC);
}
-#endif
-
-void pin_mux_usb(void)
-{
- funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
- pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
- pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
- /* USB2 PHY reset GPIO */
- pinmux_tristate_disable(PMUX_PINGRP_UAC);
-}
-
-void pin_mux_display(void)
-{
- pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
- pinmux_tristate_disable(PMUX_PINGRP_SDC);
-}
diff --git a/board/nvidia/p2371-0000/p2371-0000.c b/board/nvidia/p2371-0000/p2371-0000.c
index 6152f8898c6d..29c2f9a5d355 100644
--- a/board/nvidia/p2371-0000/p2371-0000.c
+++ b/board/nvidia/p2371-0000/p2371-0000.c
@@ -15,7 +15,18 @@
#include "../p2571/max77620_init.h"
#include "pinmux-config-p2371-0000.h"

-void pin_mux_mmc(void)
+void tegra_board_early_init_f(void)
+{
+ pinmux_clear_tristate_input_clamping();
+ gpio_config_table(p2371_0000_gpio_inits,
+ ARRAY_SIZE(p2371_0000_gpio_inits));
+ pinmux_config_pingrp_table(p2371_0000_pingrps,
+ ARRAY_SIZE(p2371_0000_pingrps));
+ pinmux_config_drvgrp_table(p2371_0000_drvgrps,
+ ARRAY_SIZE(p2371_0000_drvgrps));
+}
+
+int tegra_board_init(void)
{
struct udevice *dev;
uchar val;
@@ -26,22 +37,13 @@ void pin_mux_mmc(void)
ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
if (ret) {
printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
- return;
+ return -1;
}
/* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
val = 0xF2;
ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
-}

-void tegra_board_early_init_f(void)
-{
- pinmux_clear_tristate_input_clamping();
- gpio_config_table(p2371_0000_gpio_inits,
- ARRAY_SIZE(p2371_0000_gpio_inits));
- pinmux_config_pingrp_table(p2371_0000_pingrps,
- ARRAY_SIZE(p2371_0000_pingrps));
- pinmux_config_drvgrp_table(p2371_0000_drvgrps,
- ARRAY_SIZE(p2371_0000_drvgrps));
+ return 0;
}
diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c
index 8e0a5834415f..4dee16b9c724 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -15,7 +15,18 @@
#include "../p2571/max77620_init.h"
#include "pinmux-config-p2371-2180.h"

-void pin_mux_mmc(void)
+void tegra_board_early_init_f(void)
+{
+ pinmux_clear_tristate_input_clamping();
+ gpio_config_table(p2371_2180_gpio_inits,
+ ARRAY_SIZE(p2371_2180_gpio_inits));
+ pinmux_config_pingrp_table(p2371_2180_pingrps,
+ ARRAY_SIZE(p2371_2180_pingrps));
+ pinmux_config_drvgrp_table(p2371_2180_drvgrps,
+ ARRAY_SIZE(p2371_2180_drvgrps));
+}
+
+int tegra_board_init(void)
{
struct udevice *dev;
uchar val;
@@ -26,24 +37,15 @@ void pin_mux_mmc(void)
ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
if (ret) {
printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
- return;
+ return -1;
}
/* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
val = 0xF2;
ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
-}

-void tegra_board_early_init_f(void)
-{
- pinmux_clear_tristate_input_clamping();
- gpio_config_table(p2371_2180_gpio_inits,
- ARRAY_SIZE(p2371_2180_gpio_inits));
- pinmux_config_pingrp_table(p2371_2180_pingrps,
- ARRAY_SIZE(p2371_2180_pingrps));
- pinmux_config_drvgrp_table(p2371_2180_drvgrps,
- ARRAY_SIZE(p2371_2180_drvgrps));
+ return 0;
}

#ifdef CONFIG_PCI_TEGRA
diff --git a/board/nvidia/p2571/p2571.c b/board/nvidia/p2571/p2571.c
index ee82cc9e6fd7..c0f61483a3b0 100644
--- a/board/nvidia/p2571/p2571.c
+++ b/board/nvidia/p2571/p2571.c
@@ -15,7 +15,18 @@
#include "max77620_init.h"
#include "pinmux-config-p2571.h"

-void pin_mux_mmc(void)
+void tegra_board_early_init_f(void)
+{
+ pinmux_clear_tristate_input_clamping();
+ gpio_config_table(p2571_gpio_inits,
+ ARRAY_SIZE(p2571_gpio_inits));
+ pinmux_config_pingrp_table(p2571_pingrps,
+ ARRAY_SIZE(p2571_pingrps));
+ pinmux_config_drvgrp_table(p2571_drvgrps,
+ ARRAY_SIZE(p2571_drvgrps));
+}
+
+int tegra_board_init(void)
{
struct udevice *dev;
uchar val;
@@ -26,24 +37,15 @@ void pin_mux_mmc(void)
ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
if (ret) {
printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
- return;
+ return -1;
}
/* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
val = 0xF2;
ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
-}

-void tegra_board_early_init_f(void)
-{
- pinmux_clear_tristate_input_clamping();
- gpio_config_table(p2571_gpio_inits,
- ARRAY_SIZE(p2571_gpio_inits));
- pinmux_config_pingrp_table(p2571_pingrps,
- ARRAY_SIZE(p2571_pingrps));
- pinmux_config_drvgrp_table(p2571_drvgrps,
- ARRAY_SIZE(p2571_drvgrps));
+ return 0;
}

void tegra_board_late_init(void)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index 1a430461aa02..2208e3711f19 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -29,25 +29,15 @@ void tegra_spl_board_init(void)
#endif
}

-#ifdef CONFIG_TEGRA_MMC
-/*
- * Routine: pin_mux_mmc
- * Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-void pin_mux_mmc(void)
+void tegra_board_early_init_f(void)
{
+ /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */
+ pinmux_tristate_disable(PMUX_PINGRP_SLXK);
+ funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);
-
/* For power GPIO PI6 */
pinmux_tristate_disable(PMUX_PINGRP_ATA);
/* For CD GPIO PI5 */
pinmux_tristate_disable(PMUX_PINGRP_ATC);
}
-#endif
-
-void pin_mux_usb(void)
-{
- /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */
- pinmux_tristate_disable(PMUX_PINGRP_SLXK);
-}
diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c
index 757bef019718..d66742880487 100644
--- a/board/nvidia/whistler/whistler.c
+++ b/board/nvidia/whistler/whistler.c
@@ -23,43 +23,13 @@ void tegra_spl_board_init(void)
tegra_spl_setup_uart(TEGRA_SPL_UART_A);
}

-#ifdef CONFIG_TEGRA_MMC
-/*
- * Routine: pin_mux_mmc
- * Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-void pin_mux_mmc(void)
+void tegra_board_early_init_f(void)
{
- struct udevice *dev;
- uchar val;
- int ret;
-
- /* Turn on MAX8907B LDO12 to 2.8V for J40 power */
- ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev);
- if (ret) {
- printf("%s: Cannot find MAX8907B I2C chip\n", __func__);
- return;
- }
- val = 0x29;
- ret = dm_i2c_write(dev, 0x46, &val, 1);
- if (ret)
- printf("i2c_write 0 0x3c 0x46 failed: %d\n", ret);
- val = 0x00;
- ret = dm_i2c_write(dev, 0x45, &val, 1);
- if (ret)
- printf("i2c_write 0 0x3c 0x45 failed: %d\n", ret);
- val = 0x1f;
- ret = dm_i2c_write(dev, 0x44, &val, 1);
- if (ret)
- printf("i2c_write 0 0x3c 0x44 failed: %d\n", ret);
-
funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT);
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT);
}
-#endif

-/* this is a weak define that we are overriding */
-void pin_mux_usb(void)
+int tegra_board_init(void)
{
struct udevice *dev;
uchar val;
@@ -75,7 +45,7 @@ void pin_mux_usb(void)
ret = i2c_get_chip_for_busnum(0, 0x20, 1, &dev);
if (ret) {
printf("%s: Cannot find TAC6416 I2C chip\n", __func__);
- return;
+ return -1;
}
val = 0x03;
ret = dm_i2c_write(dev, 2, &val, 1);
@@ -85,4 +55,25 @@ void pin_mux_usb(void)
ret = dm_i2c_write(dev, 6, &val, 1);
if (ret)
printf("i2c_write 0 0x20 6 failed: %d\n", ret);
+
+ /* Turn on MAX8907B LDO12 to 2.8V for J40 power */
+ ret = i2c_get_chip_for_busnum(0, 0x3c, 1, &dev);
+ if (ret) {
+ printf("%s: Cannot find MAX8907B I2C chip\n", __func__);
+ return -1;
+ }
+ val = 0x29;
+ ret = dm_i2c_write(dev, 0x46, &val, 1);
+ if (ret)
+ printf("i2c_write 0 0x3c 0x46 failed: %d\n", ret);
+ val = 0x00;
+ ret = dm_i2c_write(dev, 0x45, &val, 1);
+ if (ret)
+ printf("i2c_write 0 0x3c 0x45 failed: %d\n", ret);
+ val = 0x1f;
+ ret = dm_i2c_write(dev, 0x44, &val, 1);
+ if (ret)
+ printf("i2c_write 0 0x3c 0x44 failed: %d\n", ret);
+
+ return 0;
}
diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c
index 44851536e6c8..6af76d68392e 100644
--- a/board/toradex/colibri_t20/colibri_t20.c
+++ b/board/toradex/colibri_t20/colibri_t20.c
@@ -30,6 +30,49 @@ void tegra_spl_board_init(void)
tegra_spl_setup_uart(TEGRA_SPL_UART_A);
}

+void tegra_board_early_init_f(void)
+{
+ /*
+ * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through
+ * device-tree
+ */
+ pinmux_tristate_disable(PMUX_PINGRP_DTA);
+ pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
+ pinmux_tristate_disable(PMUX_PINGRP_SDC);
+ /* module internal USB bus to connect ethernet chipset */
+ funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
+ /* ULPI reference clock output */
+ pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
+ pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
+ /* PHY reset GPIO */
+ pinmux_tristate_disable(PMUX_PINGRP_UAC);
+ /* VBus GPIO */
+ pinmux_tristate_disable(PMUX_PINGRP_DTE);
+ /* Assert reset for ASIX using LAN_RESET */
+ gpio_request(TEGRA_GPIO(V, 4), "LAN_RESET");
+ gpio_direction_output(TEGRA_GPIO(V, 4), 0);
+ pinmux_tristate_disable(PMUX_PINGRP_GPV);
+ /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */
+ pinmux_tristate_disable(PMUX_PINGRP_SPIG);
+ funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
+ /*
+ * configure pingroup ATC to something unrelated to
+ * avoid ATC overriding KBC
+ */
+ pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI);
+ funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
+ pinmux_tristate_disable(PMUX_PINGRP_GMB);
+}
+
+int tegra_board_init(void)
+{
+ /* Release reset for ASIX using LAN_RESET */
+ udelay(5);
+ gpio_set_value(TEGRA_GPIO(V, 4), 1);
+
+ return 0;
+}
+
int arch_misc_init(void)
{
/* Disable PMIC sleep mode on low supply voltage */
@@ -69,74 +112,3 @@ int arch_misc_init(void)

return 0;
}
-
-#ifdef CONFIG_TEGRA_MMC
-/*
- * Routine: pin_mux_mmc
- * Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-void pin_mux_mmc(void)
-{
- funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
- pinmux_tristate_disable(PMUX_PINGRP_GMB);
-}
-#endif
-
-#ifdef CONFIG_TEGRA_NAND
-void pin_mux_nand(void)
-{
- funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
-
- /*
- * configure pingroup ATC to something unrelated to
- * avoid ATC overriding KBC
- */
- pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI);
-}
-#endif
-
-#ifdef CONFIG_USB_EHCI_TEGRA
-void pin_mux_usb(void)
-{
- /* module internal USB bus to connect ethernet chipset */
- funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
-
- /* ULPI reference clock output */
- pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
- pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
-
- /* PHY reset GPIO */
- pinmux_tristate_disable(PMUX_PINGRP_UAC);
-
- /* VBus GPIO */
- pinmux_tristate_disable(PMUX_PINGRP_DTE);
-
- /* Reset ASIX using LAN_RESET */
- gpio_request(TEGRA_GPIO(V, 4), "LAN_RESET");
- gpio_direction_output(TEGRA_GPIO(V, 4), 0);
- pinmux_tristate_disable(PMUX_PINGRP_GPV);
- udelay(5);
- gpio_set_value(TEGRA_GPIO(V, 4), 1);
-
- /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */
- pinmux_tristate_disable(PMUX_PINGRP_SPIG);
-}
-#endif
-
-#ifdef CONFIG_VIDEO_TEGRA20
-/*
- * Routine: pin_mux_display
- * Description: setup the pin muxes/tristate values for the LCD interface)
- */
-void pin_mux_display(void)
-{
- /*
- * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through
- * device-tree
- */
- pinmux_tristate_disable(PMUX_PINGRP_DTA);
-
- pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
- pinmux_tristate_disable(PMUX_PINGRP_SDC);
-}
-#endif
diff --git a/board/toradex/colibri_t30/colibri_t30.c b/board/toradex/colibri_t30/colibri_t30.c
index 62a151a9dcb7..1860ac4fec4e 100644
--- a/board/toradex/colibri_t30/colibri_t30.c
+++ b/board/toradex/colibri_t30/colibri_t30.c
@@ -45,14 +45,14 @@ void tegra_board_early_init_f(void)
ARRAY_SIZE(colibri_t30_padctrl));
}

-/*
- * Enable AX88772B USB to LAN controller
- */
-void pin_mux_usb(void)
+int tegra_board_init(void)
{
+ /* Enable AX88772B USB to LAN controller */
/* Reset ASIX using LAN_RESET */
gpio_request(TEGRA_GPIO(DD, 0), "LAN_RESET");
gpio_direction_output(TEGRA_GPIO(DD, 0), 0);
udelay(5);
gpio_set_value(TEGRA_GPIO(DD, 0), 1);
+
+ return 0;
}
--
2.8.1