[U-Boot] [PATCH v2 0/8] ARM: AM335x: Add support for ICEv2 board

[U-Boot] [PATCH v2 0/8] ARM: AM335x: Add support for ICEv2 board

[Lokesh Vutla]

TI's Industrial Communication Engine EVM is a low cost hardware mainly
developed for industrial communication type applications using serial
or Ethernet based interfaces. This platform features TI's AM3359 with
800MHz single core Cortex-A8 processor, 256MB DDR3, 64MB SPI flash,
8MB NOR Flash, mmc, usb, can, dual Ethernet ports.

For more information, look at HW user guide[1], Data manual[2].

Just add basic support for the moment.

[1] http://processors.wiki.ti.com/index.php/AM335x_Industrial_Communication_Engine_EVM_Rev2_1_HW_User_Guide
[2] http://www.ti.com/lit/ds/symlink/am3359.pdf

Link to v1: https://www.mail-archive.com/u-boot%40lists.denx.de/msg212330.html

Changes since v1:
- Removed am335x_icev2_defconfig and allowed to choose UART dynamically.

Lokesh Vutla (8):
  board: AM335x-ICEv2: Add epprom support
  board: AM335x-ICEv2: Add pinmux support
  board: AM335x-ICEv2: Add DDR data
  ARM: AM33xx: Add support for Clock Synthesizer
  board: AM335x-ICEv2: Add cpsw support
  config: env: Set AM335x-ICEv2 board specific env
  ARM: dts: AM335x-ICEv2: Add minimal dts support
  board: am335x: Allow to choose serial device dynamically

 arch/arm/cpu/armv7/am33xx/Makefile                 |   2 +
 arch/arm/cpu/armv7/am33xx/clk_synthesizer.c        | 104 +++++
 arch/arm/dts/Makefile                              |   3 +-
 arch/arm/dts/am335x-icev2.dts                      | 430 +++++++++++++++++++++
 arch/arm/include/asm/arch-am33xx/clk_synthesizer.h |  43 +++
 arch/arm/include/asm/arch-am33xx/ddr_defs.h        |  15 +
 board/ti/am335x/board.c                            | 139 ++++++-
 board/ti/am335x/board.h                            |   5 +
 board/ti/am335x/mux.c                              |  31 ++
 configs/am335x_evm_defconfig                       |   2 +-
 include/configs/am335x_evm.h                       |  14 +
 include/serial.h                                   |   4 +
 12 files changed, 783 insertions(+), 9 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/am33xx/clk_synthesizer.c
 create mode 100644 arch/arm/dts/am335x-icev2.dts
 create mode 100644 arch/arm/include/asm/arch-am33xx/clk_synthesizer.h

-- 
2.8.2

[U-Boot] [PATCH v2 1/8] board: AM335x-ICEv2: Add epprom support

[Lokesh Vutla]

Similar to other TI's AM335x platforms, AM335x ICEv2 also has an
eeprom populated for its unique identification. Adding this info
so that AM335x ICEv2 specific initialization can be done.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v1:
- None

 board/ti/am335x/board.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h
index 062c345..9776df7 100644
--- a/board/ti/am335x/board.h
+++ b/board/ti/am335x/board.h
@@ -47,6 +47,11 @@ static inline int board_is_evm_15_or_later(void)
 		strncmp("1.5", board_ti_get_rev(), 3) <= 0);
 }
 
+static inline int board_is_icev2(void)
+{
+	return board_ti_is("A335_ICE") && !strncmp("2", board_ti_get_rev(), 1);
+}
+
 /*
  * We have three pin mux functions that must exist.  We must be able to enable
  * uart0, for initial output and i2c0 to read the main EEPROM.  We then have a
-- 
2.8.2

[U-Boot] [PATCH v2 2/8] board: AM335x-ICEv2: Add pinmux support

[Lokesh Vutla]

Add necessary pinmux support for AM335x ICEv2 board.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v1:
- None

 board/ti/am335x/mux.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index fdf827f..8afa5f9 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -135,6 +135,11 @@ static struct module_pin_mux gpio0_7_pin_mux[] = {
 	{-1},
 };
 
+static struct module_pin_mux gpio0_18_pin_mux[] = {
+	{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDEN)},	/* GPIO0_18 */
+	{-1},
+};
+
 static struct module_pin_mux rgmii1_pin_mux[] = {
 	{OFFSET(mii1_txen), MODE(2)},			/* RGMII1_TCTL */
 	{OFFSET(mii1_rxdv), MODE(2) | RXACTIVE},	/* RGMII1_RCTL */
@@ -172,6 +177,20 @@ static struct module_pin_mux mii1_pin_mux[] = {
 	{-1},
 };
 
+static struct module_pin_mux rmii1_pin_mux[] = {
+	{OFFSET(mdio_clk), MODE(0) | PULLUP_EN},	/* MDIO_CLK */
+	{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
+	{OFFSET(mii1_crs), MODE(1) | RXACTIVE},		/* MII1_CRS */
+	{OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},	/* MII1_RXERR */
+	{OFFSET(mii1_txen), MODE(1)},			/* MII1_TXEN */
+	{OFFSET(mii1_txd1), MODE(1)},			/* MII1_TXD1 */
+	{OFFSET(mii1_txd0), MODE(1)},			/* MII1_TXD0 */
+	{OFFSET(mii1_rxd1), MODE(1) | RXACTIVE},	/* MII1_RXD1 */
+	{OFFSET(mii1_rxd0), MODE(1) | RXACTIVE},	/* MII1_RXD0 */
+	{OFFSET(rmii1_refclk), MODE(0) | RXACTIVE},	/* RMII1_REFCLK */
+	{-1},
+};
+
 #ifdef CONFIG_NAND
 static struct module_pin_mux nand_pin_mux[] = {
 	{OFFSET(gpmc_ad0),	(MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0  */
@@ -237,6 +256,12 @@ static struct module_pin_mux bone_norcape_pin_mux[] = {
 };
 #endif
 
+static struct module_pin_mux uart3_icev2_pin_mux[] = {
+	{OFFSET(mii1_rxd3), (MODE(1) | PULLUP_EN | RXACTIVE)},	/* UART3_RXD */
+	{OFFSET(mii1_rxd2), MODE(1) | PULLUDEN},		/* UART3_TXD */
+	{-1},
+};
+
 #if defined(CONFIG_NOR_BOOT)
 void enable_norboot_pin_mux(void)
 {
@@ -365,6 +390,12 @@ void enable_board_pin_mux(void)
 #else
 		configure_module_pin_mux(mmc1_pin_mux);
 #endif
+	} else if (board_is_icev2()) {
+		configure_module_pin_mux(mmc0_pin_mux);
+		configure_module_pin_mux(gpio0_18_pin_mux);
+		configure_module_pin_mux(uart3_icev2_pin_mux);
+		configure_module_pin_mux(rmii1_pin_mux);
+		configure_module_pin_mux(spi0_pin_mux);
 	} else {
 		puts("Unknown board, cannot configure pinmux.");
 		hang();
-- 
2.8.2

[U-Boot] [PATCH v2 3/8] board: AM335x-ICEv2: Add DDR data

[Lokesh Vutla]

AM335x ICEv2 contains a 2Gbit(128Mx16) of DDR3 SDRAM(MT41J128M16JT-125),
capable of running at 400MHz. Adding this specific DDR configuration
details running at 400MHz.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v1:
- None

 arch/arm/include/asm/arch-am33xx/ddr_defs.h | 15 +++++++++++
 board/ti/am335x/board.c                     | 41 ++++++++++++++++++++++++++++-
 2 files changed, 55 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 97bbfe2..43e122e 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -54,6 +54,21 @@
 #define MT41J128MJT125_PHY_FIFO_WE		0x100
 #define MT41J128MJT125_IOCTRL_VALUE		0x18B
 
+/* Micron MT41J128M16JT-125 at 400MHz*/
+#define MT41J128MJT125_EMIF_READ_LATENCY_400MHz	0x100007
+#define MT41J128MJT125_EMIF_TIM1_400MHz		0x0AAAD4DB
+#define MT41J128MJT125_EMIF_TIM2_400MHz		0x26437FDA
+#define MT41J128MJT125_EMIF_TIM3_400MHz		0x501F83FF
+#define MT41J128MJT125_EMIF_SDCFG_400MHz	0x61C052B2
+#define MT41J128MJT125_EMIF_SDREF_400MHz	0x00000C30
+#define MT41J128MJT125_ZQ_CFG_400MHz		0x50074BE4
+#define MT41J128MJT125_RATIO_400MHz		0x80
+#define MT41J128MJT125_INVERT_CLKOUT_400MHz	0x0
+#define MT41J128MJT125_RD_DQS_400MHz		0x3A
+#define MT41J128MJT125_WR_DQS_400MHz		0x3B
+#define MT41J128MJT125_PHY_WR_DATA_400MHz	0x76
+#define MT41J128MJT125_PHY_FIFO_WE_400MHz	0x96
+
 /* Micron MT41K128M16JT-187E */
 #define MT41K128MJT187E_EMIF_READ_LATENCY	0x06
 #define MT41K128MJT187E_EMIF_TIM1		0x0888B3DB
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 579b4ef..51c4358 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -38,6 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 /* GPIO that controls power to DDR on EVM-SK */
 #define GPIO_DDR_VTT_EN		7
+#define ICE_GPIO_DDR_VTT_EN	18
 
 #if defined(CONFIG_SPL_BUILD) || \
 	(defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_DM_ETH))
@@ -97,6 +98,13 @@ static const struct ddr_data ddr3_evm_data = {
 	.datawrsratio0 = MT41J512M8RH125_PHY_WR_DATA,
 };
 
+static const struct ddr_data ddr3_icev2_data = {
+	.datardsratio0 = MT41J128MJT125_RD_DQS_400MHz,
+	.datawdsratio0 = MT41J128MJT125_WR_DQS_400MHz,
+	.datafwsratio0 = MT41J128MJT125_PHY_FIFO_WE_400MHz,
+	.datawrsratio0 = MT41J128MJT125_PHY_WR_DATA_400MHz,
+};
+
 static const struct cmd_control ddr3_cmd_ctrl_data = {
 	.cmd0csratio = MT41J128MJT125_RATIO,
 	.cmd0iclkout = MT41J128MJT125_INVERT_CLKOUT,
@@ -130,6 +138,17 @@ static const struct cmd_control ddr3_evm_cmd_ctrl_data = {
 	.cmd2iclkout = MT41J512M8RH125_INVERT_CLKOUT,
 };
 
+static const struct cmd_control ddr3_icev2_cmd_ctrl_data = {
+	.cmd0csratio = MT41J128MJT125_RATIO_400MHz,
+	.cmd0iclkout = MT41J128MJT125_INVERT_CLKOUT_400MHz,
+
+	.cmd1csratio = MT41J128MJT125_RATIO_400MHz,
+	.cmd1iclkout = MT41J128MJT125_INVERT_CLKOUT_400MHz,
+
+	.cmd2csratio = MT41J128MJT125_RATIO_400MHz,
+	.cmd2iclkout = MT41J128MJT125_INVERT_CLKOUT_400MHz,
+};
+
 static struct emif_regs ddr3_emif_reg_data = {
 	.sdram_config = MT41J128MJT125_EMIF_SDCFG,
 	.ref_ctrl = MT41J128MJT125_EMIF_SDREF,
@@ -162,6 +181,17 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
 				PHY_EN_DYN_PWRDN,
 };
 
+static struct emif_regs ddr3_icev2_emif_reg_data = {
+	.sdram_config = MT41J128MJT125_EMIF_SDCFG_400MHz,
+	.ref_ctrl = MT41J128MJT125_EMIF_SDREF_400MHz,
+	.sdram_tim1 = MT41J128MJT125_EMIF_TIM1_400MHz,
+	.sdram_tim2 = MT41J128MJT125_EMIF_TIM2_400MHz,
+	.sdram_tim3 = MT41J128MJT125_EMIF_TIM3_400MHz,
+	.zq_config = MT41J128MJT125_ZQ_CFG_400MHz,
+	.emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY_400MHz |
+				PHY_EN_DYN_PWRDN,
+};
+
 #ifdef CONFIG_SPL_OS_BOOT
 int spl_start_uboot(void)
 {
@@ -339,7 +369,7 @@ const struct dpll_params *get_dpll_ddr_params(void)
 
 	if (board_is_evm_sk())
 		return &dpll_ddr_evm_sk;
-	else if (board_is_bone_lt())
+	else if (board_is_bone_lt() || board_is_icev2())
 		return &dpll_ddr_bone_black;
 	else if (board_is_evm_15_or_later())
 		return &dpll_ddr_evm_sk;
@@ -418,6 +448,11 @@ void sdram_init(void)
 		gpio_direction_output(GPIO_DDR_VTT_EN, 1);
 	}
 
+	if (board_is_icev2()) {
+		gpio_request(ICE_GPIO_DDR_VTT_EN, "ddr_vtt_en");
+		gpio_direction_output(ICE_GPIO_DDR_VTT_EN, 1);
+	}
+
 	if (board_is_evm_sk())
 		config_ddr(303, &ioregs_evmsk, &ddr3_data,
 			   &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
@@ -429,6 +464,10 @@ void sdram_init(void)
 	else if (board_is_evm_15_or_later())
 		config_ddr(303, &ioregs_evm15, &ddr3_evm_data,
 			   &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0);
+	else if (board_is_icev2())
+		config_ddr(400, &ioregs_evmsk, &ddr3_icev2_data,
+			   &ddr3_icev2_cmd_ctrl_data, &ddr3_icev2_emif_reg_data,
+			   0);
 	else
 		config_ddr(266, &ioregs, &ddr2_data,
 			   &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0);
-- 
2.8.2

[U-Boot] [PATCH v2 4/8] ARM: AM33xx: Add support for Clock Synthesizer

[Lokesh Vutla]

The CDCE913 and CDCEL913 devices are modular PLL-based, low cost,
high performance , programmable clock synthesizers. They generate
upto 3 output clocks from a single input frequency. Each output can
be programmed for any clock-frequency.

Adding support for the same.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v1:
- None

 arch/arm/cpu/armv7/am33xx/Makefile                 |   2 +
 arch/arm/cpu/armv7/am33xx/clk_synthesizer.c        | 104 +++++++++++++++++++++
 arch/arm/include/asm/arch-am33xx/clk_synthesizer.h |  43 +++++++++
 3 files changed, 149 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/am33xx/clk_synthesizer.c
 create mode 100644 arch/arm/include/asm/arch-am33xx/clk_synthesizer.h

diff --git a/arch/arm/cpu/armv7/am33xx/Makefile b/arch/arm/cpu/armv7/am33xx/Makefile
index aae3f09..6fda482 100644
--- a/arch/arm/cpu/armv7/am33xx/Makefile
+++ b/arch/arm/cpu/armv7/am33xx/Makefile
@@ -18,3 +18,5 @@ obj-y	+= ddr.o
 obj-y	+= emif4.o
 obj-y	+= board.o
 obj-y	+= mux.o
+
+obj-$(CONFIG_CLOCK_SYNTHESIZER)	+= clk_synthesizer.o
diff --git a/arch/arm/cpu/armv7/am33xx/clk_synthesizer.c b/arch/arm/cpu/armv7/am33xx/clk_synthesizer.c
new file mode 100644
index 0000000..316e677
--- /dev/null
+++ b/arch/arm/cpu/armv7/am33xx/clk_synthesizer.c
@@ -0,0 +1,104 @@
+/*
+ * clk-synthesizer.c
+ *
+ * Clock synthesizer apis
+ *
+ * Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+
+#include <common.h>
+#include <asm/arch/clk_synthesizer.h>
+#include <i2c.h>
+
+/**
+ * clk_synthesizer_reg_read - Read register from synthesizer.
+ * @addr:	addr within the i2c device
+ * buf:		Buffer to which value is to be read.
+ *
+ * For reading the register from this clock synthesizer, a command needs to
+ * be send along with enabling byte read more, and then read can happen.
+ * Returns 0 on success
+ */
+static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
+{
+	int rc;
+
+	/* Enable Bye read */
+	addr = addr | CLK_SYNTHESIZER_BYTE_MODE;
+
+	/* Send the command byte */
+	rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
+	if (rc)
+		printf("Failed to send command to clock synthesizer\n");
+
+	/* Read the Data */
+	return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
+}
+
+/**
+ * clk_synthesizer_reg_write - Write a value to register in synthesizer.
+ * @addr:	addr within the i2c device
+ * val:		Value to be written in the addr.
+ *
+ * Enable the byte read mode in the address and start the i2c transfer.
+ * Returns 0 on success
+ */
+static int clk_synthesizer_reg_write(int addr, uint8_t val)
+{
+	uint8_t cmd[2];
+	int rc = 0;
+
+	/* Enable byte write */
+	cmd[0] = addr | CLK_SYNTHESIZER_BYTE_MODE;
+	cmd[1] = val;
+
+	rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
+	if (rc)
+		printf("Clock synthesizer reg write failed at addr = 0x%x\n",
+		       addr);
+	return rc;
+}
+
+/**
+ * setup_clock_syntherizer - Program the clock synthesizer to get the desired
+ *				frequency.
+ * @data: Data containing the desired output
+ *
+ * This is a PLL-based high performance synthesizer which gives 3 outputs
+ * as per the PLL_DIV and load capacitor programmed.
+ */
+int setup_clock_synthesizer(struct clk_synth *data)
+{
+	int rc;
+	uint8_t val;
+
+	rc =  i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
+	if (rc) {
+		printf("i2c probe failed at address 0x%x\n",
+		       CLK_SYNTHESIZER_I2C_ADDR);
+		return rc;
+	}
+
+	rc = clk_synthesizer_reg_read(CLK_SYNTHESIZER_ID_REG, &val);
+	if (val != data->id)
+		return rc;
+
+	/* Crystal Load capacitor selection */
+	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_XCSEL, data->capacitor);
+	if (rc)
+		return rc;
+	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_MUX_REG, data->mux);
+	if (rc)
+		return rc;
+	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV2_REG, data->pdiv2);
+	if (rc)
+		return rc;
+	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV3_REG, data->pdiv3);
+	if (rc)
+		return rc;
+
+	return 0;
+}
diff --git a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
new file mode 100644
index 0000000..a5af012
--- /dev/null
+++ b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
@@ -0,0 +1,43 @@
+/*
+ * clk-synthesizer.h
+ *
+ * Clock synthesizer header
+ *
+ * Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CLK_SYNTHESIZER_H
+#define __CLK_SYNTHESIZER_H
+
+#include <common.h>
+
+#define CLK_SYNTHESIZER_ID_REG		0x0
+#define CLK_SYNTHESIZER_XCSEL		0x05
+#define CLK_SYNTHESIZER_MUX_REG		0x14
+#define CLK_SYNTHESIZER_PDIV2_REG	0x16
+#define CLK_SYNTHESIZER_PDIV3_REG	0x17
+
+#define CLK_SYNTHESIZER_BYTE_MODE	0x80
+
+/**
+ * struct clk_synth: This structure holds data neeed for configuring
+ *		     for clock synthesizer.
+ * @id: The id of synthesizer
+ * @capacitor: value of the capacitor attached
+ * @mux: mux settings.
+ * @pdiv2: Div to be applied to second output
+ * @pdiv3: Div to be applied to third output
+ */
+struct clk_synth {
+	u32 id;
+	u32 capacitor;
+	u32 mux;
+	u32 pdiv2;
+	u32 pdiv3;
+};
+
+int setup_clock_synthesizer(struct clk_synth *data);
+
+#endif
-- 
2.8.2

[U-Boot] [PATCH v2 5/8] board: AM335x-ICEv2: Add cpsw support

[Lokesh Vutla]

In order to enable cpsw on AM335x ICEv2 board, the following needs to be done:

1)There are few on board jumper settings which gives a choice between
cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting
this, there are few GPIOs which control these muxes that needs to be held high.

2) The clock to PHY is provided by a PLL-based clock synthesizer[2] connected
via I2C. This needs to properly programmed and locked for PHY operation.
And PHY needs to be reset before before being used, which is also held by
a GPIO.

3) RMII mode needs to be selected.

[1] http://www.ti.com/lit/zip/tidr336
[2] http://www.ti.com/lit/ds/symlink/cdce913.pdf

Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v1:
- None

 board/ti/am335x/board.c      | 87 ++++++++++++++++++++++++++++++++++++++++----
 include/configs/am335x_evm.h |  5 +++
 2 files changed, 85 insertions(+), 7 deletions(-)

diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 51c4358..8f47692 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -16,6 +16,7 @@
 #include <asm/arch/omap.h>
 #include <asm/arch/ddr_defs.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/clk_synthesizer.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/sys_proto.h>
@@ -37,8 +38,13 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* GPIO that controls power to DDR on EVM-SK */
-#define GPIO_DDR_VTT_EN		7
-#define ICE_GPIO_DDR_VTT_EN	18
+#define GPIO_TO_PIN(bank, gpio)		(32 * (bank) + (gpio))
+#define GPIO_DDR_VTT_EN		GPIO_TO_PIN(0, 7)
+#define ICE_GPIO_DDR_VTT_EN	GPIO_TO_PIN(0, 18)
+#define GPIO_PR1_MII_CTRL	GPIO_TO_PIN(3, 4)
+#define GPIO_MUX_MII_CTRL	GPIO_TO_PIN(3, 10)
+#define GPIO_FET_SWITCH_CTRL	GPIO_TO_PIN(0, 7)
+#define GPIO_PHY_RESET		GPIO_TO_PIN(2, 5)
 
 #if defined(CONFIG_SPL_BUILD) || \
 	(defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_DM_ETH))
@@ -474,6 +480,49 @@ void sdram_init(void)
 }
 #endif
 
+#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
+	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+static void request_and_set_gpio(int gpio, char *name)
+{
+	int ret;
+
+	ret = gpio_request(gpio, name);
+	if (ret < 0) {
+		printf("%s: Unable to request %s\n", __func__, name);
+		return;
+	}
+
+	ret = gpio_direction_output(gpio, 0);
+	if (ret < 0) {
+		printf("%s: Unable to set %s  as output\n", __func__, name);
+		goto err_free_gpio;
+	}
+
+	gpio_set_value(gpio, 1);
+
+	return;
+
+err_free_gpio:
+	gpio_free(gpio);
+}
+
+#define REQUEST_AND_SET_GPIO(N)	request_and_set_gpio(N, #N);
+
+/**
+ * RMII mode on ICEv2 board needs 50MHz clock. Given the clock
+ * synthesizer With a capacitor of 18pF, and 25MHz input clock cycle
+ * PLL1 gives an output of 100MHz. So, configuring the div2/3 as 2 to
+ * give 50MHz output for Eth0 and 1.
+ */
+static struct clk_synth cdce913_data = {
+	.id = 0x81,
+	.capacitor = 0x90,
+	.mux = 0x6d,
+	.pdiv2 = 0x2,
+	.pdiv3 = 0x2,
+};
+#endif
+
 /*
  * Basic board specific setup.  Pinmux has been handled already.
  */
@@ -487,6 +536,23 @@ int board_init(void)
 #if defined(CONFIG_NOR) || defined(CONFIG_NAND)
 	gpmc_init();
 #endif
+#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD))
+	int rv;
+
+	if (board_is_icev2()) {
+		REQUEST_AND_SET_GPIO(GPIO_PR1_MII_CTRL);
+		REQUEST_AND_SET_GPIO(GPIO_MUX_MII_CTRL);
+		REQUEST_AND_SET_GPIO(GPIO_FET_SWITCH_CTRL);
+		REQUEST_AND_SET_GPIO(GPIO_PHY_RESET);
+
+		rv = setup_clock_synthesizer(&cdce913_data);
+		if (rv) {
+			printf("Clock synthesizer setup failed %d\n", rv);
+			return rv;
+		}
+	}
+#endif
+
 	return 0;
 }
 
@@ -554,6 +620,12 @@ static struct cpsw_platform_data cpsw_data = {
 };
 #endif
 
+#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)) &&\
+	defined(CONFIG_SPL_BUILD)) || \
+	((defined(CONFIG_DRIVER_TI_CPSW) || \
+	  defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \
+	 !defined(CONFIG_SPL_BUILD))
+
 /*
  * This function will:
  * Read the eFuse for MAC addresses, and set ethaddr/eth1addr/usbnet_devaddr
@@ -565,11 +637,6 @@ static struct cpsw_platform_data cpsw_data = {
  * Build in only these cases to avoid warnings about unused variables
  * when we build an SPL that has neither option but full U-Boot will.
  */
-#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)) \
-		&& defined(CONFIG_SPL_BUILD)) || \
-	((defined(CONFIG_DRIVER_TI_CPSW) || \
-	  defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)) && \
-	 !defined(CONFIG_SPL_BUILD))
 int board_eth_init(bd_t *bis)
 {
 	int rv, n = 0;
@@ -620,6 +687,12 @@ int board_eth_init(bd_t *bis)
 		writel(MII_MODE_ENABLE, &cdev->miisel);
 		cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
 				PHY_INTERFACE_MODE_MII;
+	} else if (board_is_icev2()) {
+		writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
+		cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
+		cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RMII;
+		cpsw_slaves[0].phy_addr = 1;
+		cpsw_slaves[1].phy_addr = 3;
 	} else {
 		writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel);
 		cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index dfd00de..7c7f197 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -475,4 +475,9 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
 #endif  /* NOR support */
 
+#ifdef CONFIG_DRIVER_TI_CPSW
+#define CONFIG_CLOCK_SYNTHESIZER
+#define CLK_SYNTHESIZER_I2C_ADDR 0x65
+#endif
+
 #endif	/* ! __CONFIG_AM335X_EVM_H */
-- 
2.8.2

[U-Boot] [PATCH v2 6/8] config: env: Set AM335x-ICEv2 board specific env

[Lokesh Vutla]

Populate the right dtb file and console for AM335x-ICEv2 board.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v1:
- None

 include/configs/am335x_evm.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 7c7f197..ba4c215 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -91,6 +91,7 @@
 
 #define CONFIG_BOOTCOMMAND \
 	"run findfdt; " \
+	"run init_console; " \
 	"run envboot; " \
 	"run distro_bootcmd"
 
@@ -169,8 +170,16 @@
 			"setenv fdtfile am335x-evm.dtb; fi; " \
 		"if test $board_name = A335X_SK; then " \
 			"setenv fdtfile am335x-evmsk.dtb; fi; " \
+		"if test $board_name = A335_ICE; then " \
+			"setenv fdtfile am335x-icev2.dtb; fi; " \
 		"if test $fdtfile = undefined; then " \
 			"echo WARNING: Could not determine device tree to use; fi; \0" \
+	"init_console=" \
+		"if test $board_name = A335_ICE; then "\
+			"setenv console ttyO3,115200n8;" \
+		"else " \
+			"setenv console ttyO0,115200n8;" \
+		"fi;\0" \
 	NANDARGS \
 	NETARGS \
 	DFUARGS \
-- 
2.8.2

[U-Boot] [PATCH v2 7/8] ARM: dts: AM335x-ICEv2: Add minimal dts support

[Lokesh Vutla]

Add minimal dts support for AM335x-ICEv2 board

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
Changes since v1:
- None

 arch/arm/dts/Makefile         |   3 +-
 arch/arm/dts/am335x-icev2.dts | 430 ++++++++++++++++++++++++++++++++++++++++++
 board/ti/am335x/board.c       |   2 +
 configs/am335x_evm_defconfig  |   2 +-
 4 files changed, 435 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/am335x-icev2.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 800750b..5efe9fe 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -91,7 +91,8 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
 	zynqmp-zc1751-xm019-dc5.dtb
 dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb am335x-evm.dtb \
 	am335x-evmsk.dtb \
-	am335x-bonegreen.dtb
+	am335x-bonegreen.dtb \
+	am335x-icev2.dtb
 dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb	\
 	am43x-epos-evm.dtb \
 	am437x-idk-evm.dtb
diff --git a/arch/arm/dts/am335x-icev2.dts b/arch/arm/dts/am335x-icev2.dts
new file mode 100644
index 0000000..debc6f6
--- /dev/null
+++ b/arch/arm/dts/am335x-icev2.dts
@@ -0,0 +1,430 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * AM335x ICE V2 board
+ * http://www.ti.com/tool/tmdsice3359
+ */
+
+/dts-v1/;
+
+#include "am33xx.dtsi"
+
+/ {
+	model = "TI AM3359 ICE-V2";
+	compatible = "ti,am3359-icev2", "ti,am33xx";
+
+	chosen {
+		stdout-path = &uart3;
+		tick-timer = &timer2;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>; /* 256 MB */
+	};
+
+	vbat: fixedregulator at 0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vbat";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+	};
+
+	vtt_fixed: fixedregulator at 1 {
+		compatible = "regulator-fixed";
+		regulator-name = "vtt";
+		regulator-min-microvolt = <1500000>;
+		regulator-max-microvolt = <1500000>;
+		gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+		regulator-always-on;
+		regulator-boot-on;
+		enable-active-high;
+	};
+
+	leds at 0 {
+		compatible = "gpio-leds";
+
+		led at 0 {
+			label = "out0";
+			gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 1 {
+			label = "out1";
+			gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 2 {
+			label = "out2";
+			gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 3 {
+			label = "out3";
+			gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 4 {
+			label = "out4";
+			gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 5 {
+			label = "out5";
+			gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 6 {
+			label = "out6";
+			gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 7 {
+			label = "out7";
+			gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+	};
+
+	/* Tricolor status LEDs */
+	leds at 1 {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&user_leds>;
+
+		led at 0 {
+			label = "status0:red:cpu0";
+			gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			linux,default-trigger = "cpu0";
+		};
+
+		led at 1 {
+			label = "status0:green:usr";
+			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 2 {
+			label = "status0:yellow:usr";
+			gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 3 {
+			label = "status1:red:mmc0";
+			gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			linux,default-trigger = "mmc0";
+		};
+
+		led at 4 {
+			label = "status1:green:usr";
+			gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		led at 5 {
+			label = "status1:yellow:usr";
+			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+	};
+};
+
+&am33xx_pinmux {
+	user_leds: user_leds {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE7) /* (J18) gmii1_txd3.gpio0[16] */
+			AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE7) /* (K15) gmii1_txd2.gpio0[17] */
+			AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] */
+			AM33XX_IOPAD(0x9b4, PIN_OUTPUT | MUX_MODE7) /* (D14) xdma_event_intr1.gpio0[20] */
+			AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
+			AM33XX_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] */
+		>;
+	};
+
+	mmc0_pins_default: mmc0_pins_default {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
+			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* (F18) mmc0_dat2.mmc0_dat2 */
+			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* (G15) mmc0_dat1.mmc0_dat1 */
+			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
+			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
+			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
+			AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* (C15) spi0_cs1.mmc0_sdcd */
+		>;
+	};
+
+	i2c0_pins_default: i2c0_pins_default {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
+			AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
+		>;
+	};
+
+	spi0_pins_default: spi0_pins_default {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
+			AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
+			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
+			AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
+		>;
+	};
+
+	uart3_pins_default: uart3_pins_default {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
+			AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
+		>;
+	};
+
+	cpsw_default: cpsw_default {
+		pinctrl-single,pins = <
+			/* Slave 1, RMII mode */
+			AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLUP | MUX_MODE1))	/* mii1_crs.rmii1_crs_dv */
+			AM33XX_IOPAD(0x944, (PIN_INPUT_PULLUP | MUX_MODE0))	/* rmii1_refclk.rmii1_refclk */
+			AM33XX_IOPAD(0x940, (PIN_INPUT_PULLUP | MUX_MODE1))	/* mii1_rxd0.rmii1_rxd0 */
+			AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLUP | MUX_MODE1))	/* mii1_rxd1.rmii1_rxd1 */
+			AM33XX_IOPAD(0x910, (PIN_INPUT_PULLUP | MUX_MODE1))	/* mii1_rxerr.rmii1_rxerr */
+			AM33XX_IOPAD(0x928, (PIN_OUTPUT_PULLDOWN | MUX_MODE1))	/* mii1_txd0.rmii1_txd0 */
+			AM33XX_IOPAD(0x924, (PIN_OUTPUT_PULLDOWN | MUX_MODE1))	/* mii1_txd1.rmii1_txd1 */
+			AM33XX_IOPAD(0x914, (PIN_OUTPUT_PULLDOWN | MUX_MODE1))	/* mii1_txen.rmii1_txen */
+			/* Slave 2, RMII mode */
+			AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE3))	/* gpmc_wait0.rmii2_crs_dv */
+			AM33XX_IOPAD(0x908, (PIN_INPUT_PULLUP | MUX_MODE1))	/* mii1_col.rmii2_refclk */
+			AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLUP | MUX_MODE3))	/* gpmc_a11.rmii2_rxd0 */
+			AM33XX_IOPAD(0x868, (PIN_INPUT_PULLUP | MUX_MODE3))	/* gpmc_a10.rmii2_rxd1 */
+			AM33XX_IOPAD(0x874, (PIN_INPUT_PULLUP | MUX_MODE3))	/* gpmc_wpn.rmii2_rxerr */
+			AM33XX_IOPAD(0x854, (PIN_OUTPUT_PULLDOWN | MUX_MODE3))	/* gpmc_a5.rmii2_txd0 */
+			AM33XX_IOPAD(0x850, (PIN_OUTPUT_PULLDOWN | MUX_MODE3))	/* gpmc_a4.rmii2_txd1 */
+			AM33XX_IOPAD(0x840, (PIN_OUTPUT_PULLDOWN | MUX_MODE3))	/* gpmc_a0.rmii2_txen */
+		>;
+	};
+
+	cpsw_sleep: cpsw_sleep {
+		pinctrl-single,pins = <
+			/* Slave 1 reset value */
+			AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x944, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x910, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+
+			/* Slave 2 reset value */
+			AM33XX_IOPAD(0x870, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x908, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x868, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x874, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x854, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x850, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x840, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+		>;
+	};
+
+	davinci_mdio_default: davinci_mdio_default {
+		pinctrl-single,pins = <
+			/* MDIO */
+			AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0))	/* mdio_data.mdio_data */
+			AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0))			/* mdio_clk.mdio_clk */
+		>;
+	};
+
+	davinci_mdio_sleep: davinci_mdio_sleep {
+		pinctrl-single,pins = <
+			/* MDIO reset value */
+			AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+			AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
+		>;
+	};
+};
+
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins_default>;
+
+	status = "okay";
+	clock-frequency = <400000>;
+
+	tps: power-controller at 2d {
+		reg = <0x2d>;
+	};
+
+	tpic2810: gpio at 60 {
+		compatible = "ti,tpic2810";
+		reg = <0x60>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+};
+
+#include "tps65910.dtsi"
+
+&tps {
+	vcc1-supply = <&vbat>;
+	vcc2-supply = <&vbat>;
+	vcc3-supply = <&vbat>;
+	vcc4-supply = <&vbat>;
+	vcc5-supply = <&vbat>;
+	vcc6-supply = <&vbat>;
+	vcc7-supply = <&vbat>;
+	vccio-supply = <&vbat>;
+
+	regulators {
+		vrtc_reg: regulator at 0 {
+			regulator-always-on;
+		};
+
+		vio_reg: regulator at 1 {
+			regulator-always-on;
+		};
+
+		vdd1_reg: regulator at 2 {
+			regulator-name = "vdd_mpu";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1326000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vdd2_reg: regulator at 3 {
+			regulator-name = "vdd_core";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1144000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vdd3_reg: regulator at 4 {
+			regulator-always-on;
+		};
+
+		vdig1_reg: regulator at 5 {
+			regulator-always-on;
+		};
+
+		vdig2_reg: regulator at 6 {
+			regulator-always-on;
+		};
+
+		vpll_reg: regulator at 7 {
+			regulator-always-on;
+		};
+
+		vdac_reg: regulator at 8 {
+			regulator-always-on;
+		};
+
+		vaux1_reg: regulator at 9 {
+			regulator-always-on;
+		};
+
+		vaux2_reg: regulator at 10 {
+			regulator-always-on;
+		};
+
+		vaux33_reg: regulator at 11 {
+			regulator-always-on;
+		};
+
+		vmmc_reg: regulator at 12 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+	};
+};
+
+&mmc1 {
+	status = "okay";
+	vmmc-supply = <&vmmc_reg>;
+	bus-width = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins_default>;
+};
+
+&gpio0 {
+	/* Do not idle the GPIO used for holding the VTT regulator */
+	ti,no-reset-on-init;
+	ti,no-idle-on-init;
+
+	p7 {
+		gpio-hog;
+		gpios = <7 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "FET_SWITCH_CTRL";
+	};
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3_pins_default>;
+	status = "okay";
+};
+
+&gpio3 {
+	p4 {
+		gpio-hog;
+		gpios = <4 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "PR1_MII_CTRL";
+	};
+
+	p10 {
+		gpio-hog;
+		gpios = <10 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "MUX_MII_CTRL";
+	};
+};
+
+&cpsw_emac0 {
+	phy_id = <&davinci_mdio>, <1>;
+	phy-mode = "rmii";
+	dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+	phy_id = <&davinci_mdio>, <3>;
+	phy-mode = "rmii";
+	dual_emac_res_vlan = <2>;
+};
+
+&mac {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&cpsw_default>;
+	pinctrl-1 = <&cpsw_sleep>;
+	status = "okay";
+	dual_emac;
+};
+
+&phy_sel {
+	rmii-clock-ext;
+};
+
+&davinci_mdio {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&davinci_mdio_default>;
+	pinctrl-1 = <&davinci_mdio_sleep>;
+	status = "okay";
+	reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <2>;   /* PHY datasheet states 1uS min */
+};
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 8f47692..ff52314 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -758,6 +758,8 @@ int board_fit_config_name_match(const char *name)
 		return 0;
 	else if (board_is_bbg1() && !strcmp(name, "am335x-bonegreen"))
 		return 0;
+	else if (board_is_icev2() && !strcmp(name, "am335x-icev2"))
+		return 0;
 	else
 		return -1;
 }
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 5f917d6..12198c0 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -46,4 +46,4 @@ CONFIG_RSA=y
 CONFIG_FIT=y
 CONFIG_SPL_OF_LIBFDT=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen"
+CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
-- 
2.8.2

[U-Boot] [PATCH v2 8/8] board: am335x: Allow to choose serial device dynamically

[Lokesh Vutla]

Different AM335x based platforms have different serial consoles. As serial
console is Kconfig option a separate defconfig has to be created for each
platform. So pass the serial device dynamically.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Changes since v1:
- New patch.
 board/ti/am335x/board.c | 11 +++++++++++
 include/serial.h        |  4 ++++
 2 files changed, 15 insertions(+)

diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index ff52314..56f4984 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <errno.h>
 #include <spl.h>
+#include <serial.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/omap.h>
@@ -59,6 +60,16 @@ static inline int __maybe_unused read_eeprom(void)
 	return ti_i2c_eeprom_am_get(-1, CONFIG_SYS_I2C_EEPROM_ADDR);
 }
 
+#ifndef CONFIG_DM_SERIAL
+struct serial_device *default_serial_console(void)
+{
+	if (board_is_icev2())
+		return &eserial4_device;
+	else
+		return &eserial1_device;
+}
+#endif
+
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 static const struct ddr_data ddr2_data = {
 	.datardsratio0 = MT47H128M16RT25E_RD_DQS,
diff --git a/include/serial.h b/include/serial.h
index e490f9a..47332c5 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -40,6 +40,10 @@ extern struct serial_device serial1_device;
 
 extern struct serial_device eserial1_device;
 extern struct serial_device eserial2_device;
+extern struct serial_device eserial3_device;
+extern struct serial_device eserial4_device;
+extern struct serial_device eserial5_device;
+extern struct serial_device eserial6_device;
 
 extern void serial_register(struct serial_device *);
 extern void serial_initialize(void);
-- 
2.8.2

[U-Boot] [PATCH v2 8/8] board: am335x: Allow to choose serial device dynamically

[Tom Rini]

On Mon, May 16, 2016 at 11:47:29AM +0530, Lokesh Vutla wrote:

> Different AM335x based platforms have different serial consoles. As serial
> console is Kconfig option a separate defconfig has to be created for each
> platform. So pass the serial device dynamically.
> 
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> ---
> Changes since v1:
> - New patch.
>  board/ti/am335x/board.c | 11 +++++++++++
>  include/serial.h        |  4 ++++
>  2 files changed, 15 insertions(+)
> 
> diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
> index ff52314..56f4984 100644
> --- a/board/ti/am335x/board.c
> +++ b/board/ti/am335x/board.c
> @@ -11,6 +11,7 @@
>  #include <common.h>
>  #include <errno.h>
>  #include <spl.h>
> +#include <serial.h>
>  #include <asm/arch/cpu.h>
>  #include <asm/arch/hardware.h>
>  #include <asm/arch/omap.h>
> @@ -59,6 +60,16 @@ static inline int __maybe_unused read_eeprom(void)
>  	return ti_i2c_eeprom_am_get(-1, CONFIG_SYS_I2C_EEPROM_ADDR);
>  }
>  
> +#ifndef CONFIG_DM_SERIAL
> +struct serial_device *default_serial_console(void)
> +{
> +	if (board_is_icev2())
> +		return &eserial4_device;
> +	else
> +		return &eserial1_device;
> +}
> +#endif
> +
>  #ifndef CONFIG_SKIP_LOWLEVEL_INIT
>  static const struct ddr_data ddr2_data = {
>  	.datardsratio0 = MT47H128M16RT25E_RD_DQS,

... so in the DM case we're already handling this correctly?  Can't we
just say that ICEv2 is only supported with DM enabled so that we don't
need to add compat code that we'll remove rather soon (I hope..) ?
Thanks!

-- 
Tom
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[U-Boot] [PATCH v2 8/8] board: am335x: Allow to choose serial device dynamically

[Lokesh Vutla]

On 5/17/2016 6:11 AM, Tom Rini wrote:
> On Mon, May 16, 2016 at 11:47:29AM +0530, Lokesh Vutla wrote:
>
>> Different AM335x based platforms have different serial consoles. As serial
>> console is Kconfig option a separate defconfig has to be created for each
>> platform. So pass the serial device dynamically.
>>
>> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
>> ---
>> Changes since v1:
>> - New patch.
>>   board/ti/am335x/board.c | 11 +++++++++++
>>   include/serial.h        |  4 ++++
>>   2 files changed, 15 insertions(+)
>>
>> diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
>> index ff52314..56f4984 100644
>> --- a/board/ti/am335x/board.c
>> +++ b/board/ti/am335x/board.c
>> @@ -11,6 +11,7 @@
>>   #include <common.h>
>>   #include <errno.h>
>>   #include <spl.h>
>> +#include <serial.h>
>>   #include <asm/arch/cpu.h>
>>   #include <asm/arch/hardware.h>
>>   #include <asm/arch/omap.h>
>> @@ -59,6 +60,16 @@ static inline int __maybe_unused read_eeprom(void)
>>   	return ti_i2c_eeprom_am_get(-1, CONFIG_SYS_I2C_EEPROM_ADDR);
>>   }
>>
>> +#ifndef CONFIG_DM_SERIAL
>> +struct serial_device *default_serial_console(void)
>> +{
>> +	if (board_is_icev2())
>> +		return &eserial4_device;
>> +	else
>> +		return &eserial1_device;
>> +}
>> +#endif
>> +
>>   #ifndef CONFIG_SKIP_LOWLEVEL_INIT
>>   static const struct ddr_data ddr2_data = {
>>   	.datardsratio0 = MT47H128M16RT25E_RD_DQS,
>
> ... so in the DM case we're already handling this correctly?  Can't we

With DM+DT we are handling it correctly which is only in U-Boot. This 
part of code is meant for only SPL(DM_* is not yet enabled in SPL).

Thanks and regards,
Lokesh

> just say that ICEv2 is only supported with DM enabled so that we don't
> need to add compat code that we'll remove rather soon (I hope..) ?
> Thanks!
>

[U-Boot] [PATCH v2 8/8] board: am335x: Allow to choose serial device dynamically

[Tom Rini]

On Tue, May 17, 2016 at 09:49:53AM +0530, Lokesh Vutla wrote:
> 
> 
> On 5/17/2016 6:11 AM, Tom Rini wrote:
> >On Mon, May 16, 2016 at 11:47:29AM +0530, Lokesh Vutla wrote:
> >
> >>Different AM335x based platforms have different serial consoles. As serial
> >>console is Kconfig option a separate defconfig has to be created for each
> >>platform. So pass the serial device dynamically.
> >>
> >>Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> >>---
> >>Changes since v1:
> >>- New patch.
> >>  board/ti/am335x/board.c | 11 +++++++++++
> >>  include/serial.h        |  4 ++++
> >>  2 files changed, 15 insertions(+)
> >>
> >>diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
> >>index ff52314..56f4984 100644
> >>--- a/board/ti/am335x/board.c
> >>+++ b/board/ti/am335x/board.c
> >>@@ -11,6 +11,7 @@
> >>  #include <common.h>
> >>  #include <errno.h>
> >>  #include <spl.h>
> >>+#include <serial.h>
> >>  #include <asm/arch/cpu.h>
> >>  #include <asm/arch/hardware.h>
> >>  #include <asm/arch/omap.h>
> >>@@ -59,6 +60,16 @@ static inline int __maybe_unused read_eeprom(void)
> >>  	return ti_i2c_eeprom_am_get(-1, CONFIG_SYS_I2C_EEPROM_ADDR);
> >>  }
> >>
> >>+#ifndef CONFIG_DM_SERIAL
> >>+struct serial_device *default_serial_console(void)
> >>+{
> >>+	if (board_is_icev2())
> >>+		return &eserial4_device;
> >>+	else
> >>+		return &eserial1_device;
> >>+}
> >>+#endif
> >>+
> >>  #ifndef CONFIG_SKIP_LOWLEVEL_INIT
> >>  static const struct ddr_data ddr2_data = {
> >>  	.datardsratio0 = MT47H128M16RT25E_RD_DQS,
> >
> >... so in the DM case we're already handling this correctly?  Can't we
> 
> With DM+DT we are handling it correctly which is only in U-Boot.
> This part of code is meant for only SPL(DM_* is not yet enabled in
> SPL).

... aren't we in the middle of doing this conversion 'tho?

-- 
Tom
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[U-Boot] [PATCH v2 8/8] board: am335x: Allow to choose serial device dynamically

[Lokesh Vutla]

On 5/17/2016 4:56 PM, Tom Rini wrote:
> On Tue, May 17, 2016 at 09:49:53AM +0530, Lokesh Vutla wrote:
>>
>>
>> On 5/17/2016 6:11 AM, Tom Rini wrote:
>>> On Mon, May 16, 2016 at 11:47:29AM +0530, Lokesh Vutla wrote:
>>>
>>>> Different AM335x based platforms have different serial consoles. As serial
>>>> console is Kconfig option a separate defconfig has to be created for each
>>>> platform. So pass the serial device dynamically.
>>>>
>>>> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
>>>> ---
>>>> Changes since v1:
>>>> - New patch.
>>>>   board/ti/am335x/board.c | 11 +++++++++++
>>>>   include/serial.h        |  4 ++++
>>>>   2 files changed, 15 insertions(+)
>>>>
>>>> diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
>>>> index ff52314..56f4984 100644
>>>> --- a/board/ti/am335x/board.c
>>>> +++ b/board/ti/am335x/board.c
>>>> @@ -11,6 +11,7 @@
>>>>   #include <common.h>
>>>>   #include <errno.h>
>>>>   #include <spl.h>
>>>> +#include <serial.h>
>>>>   #include <asm/arch/cpu.h>
>>>>   #include <asm/arch/hardware.h>
>>>>   #include <asm/arch/omap.h>
>>>> @@ -59,6 +60,16 @@ static inline int __maybe_unused read_eeprom(void)
>>>>   	return ti_i2c_eeprom_am_get(-1, CONFIG_SYS_I2C_EEPROM_ADDR);
>>>>   }
>>>>
>>>> +#ifndef CONFIG_DM_SERIAL
>>>> +struct serial_device *default_serial_console(void)
>>>> +{
>>>> +	if (board_is_icev2())
>>>> +		return &eserial4_device;
>>>> +	else
>>>> +		return &eserial1_device;
>>>> +}
>>>> +#endif
>>>> +
>>>>   #ifndef CONFIG_SKIP_LOWLEVEL_INIT
>>>>   static const struct ddr_data ddr2_data = {
>>>>   	.datardsratio0 = MT47H128M16RT25E_RD_DQS,
>>>
>>> ... so in the DM case we're already handling this correctly?  Can't we
>>
>> With DM+DT we are handling it correctly which is only in U-Boot.
>> This part of code is meant for only SPL(DM_* is not yet enabled in
>> SPL).
>
> ... aren't we in the middle of doing this conversion 'tho?

hmm... I don't think this conversion for SPL has been done.

Thanks and regards,
Lokesh
>

[U-Boot] [U-Boot, v2, 1/8] board: AM335x-ICEv2: Add epprom support

[Tom Rini]

On Mon, May 16, 2016 at 11:47:22AM +0530, Lokesh Vutla wrote:

> Similar to other TI's AM335x platforms, AM335x ICEv2 also has an
> eeprom populated for its unique identification. Adding this info
> so that AM335x ICEv2 specific initialization can be done.
> 
> Reviewed-by: Tom Rini <trini@konsulko.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v2, 2/8] board: AM335x-ICEv2: Add pinmux support

[Tom Rini]

On Mon, May 16, 2016 at 11:47:23AM +0530, Lokesh Vutla wrote:

> Add necessary pinmux support for AM335x ICEv2 board.
> 
> Reviewed-by: Tom Rini <trini@konsulko.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot,v2,3/8] board: AM335x-ICEv2: Add DDR data

[Tom Rini]

On Mon, May 16, 2016 at 11:47:24AM +0530, Lokesh Vutla wrote:

> AM335x ICEv2 contains a 2Gbit(128Mx16) of DDR3 SDRAM(MT41J128M16JT-125),
> capable of running at 400MHz. Adding this specific DDR configuration
> details running at 400MHz.
> 
> Reviewed-by: Tom Rini <trini@konsulko.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v2, 4/8] ARM: AM33xx: Add support for Clock Synthesizer

[Tom Rini]

On Mon, May 16, 2016 at 11:47:25AM +0530, Lokesh Vutla wrote:

> The CDCE913 and CDCEL913 devices are modular PLL-based, low cost,
> high performance , programmable clock synthesizers. They generate
> upto 3 output clocks from a single input frequency. Each output can
> be programmed for any clock-frequency.
> 
> Adding support for the same.
> 
> Reviewed-by: Tom Rini <trini@konsulko.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot,v2,5/8] board: AM335x-ICEv2: Add cpsw support

[Tom Rini]

On Mon, May 16, 2016 at 11:47:26AM +0530, Lokesh Vutla wrote:

> In order to enable cpsw on AM335x ICEv2 board, the following needs to be done:
> 
> 1)There are few on board jumper settings which gives a choice between
> cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting
> this, there are few GPIOs which control these muxes that needs to be held high.
> 
> 2) The clock to PHY is provided by a PLL-based clock synthesizer[2] connected
> via I2C. This needs to properly programmed and locked for PHY operation.
> And PHY needs to be reset before before being used, which is also held by
> a GPIO.
> 
> 3) RMII mode needs to be selected.
> 
> [1] http://www.ti.com/lit/zip/tidr336
> [2] http://www.ti.com/lit/ds/symlink/cdce913.pdf
> 
> Reviewed-by: Tom Rini <trini@konsulko.com>
> Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v2, 6/8] config: env: Set AM335x-ICEv2 board specific env

[Tom Rini]

On Mon, May 16, 2016 at 11:47:27AM +0530, Lokesh Vutla wrote:

> Populate the right dtb file and console for AM335x-ICEv2 board.
> 
> Reviewed-by: Tom Rini <trini@konsulko.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v2, 7/8] ARM: dts: AM335x-ICEv2: Add minimal dts support

[Tom Rini]

On Mon, May 16, 2016 at 11:47:28AM +0530, Lokesh Vutla wrote:

> Add minimal dts support for AM335x-ICEv2 board
> 
> Reviewed-by: Tom Rini <trini@konsulko.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> Signed-off-by: Roger Quadros <rogerq@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v2, 8/8] board: am335x: Allow to choose serial device dynamically

[Tom Rini]

On Mon, May 16, 2016 at 11:47:29AM +0530, Lokesh Vutla wrote:

> Different AM335x based platforms have different serial consoles. As serial
> console is Kconfig option a separate defconfig has to be created for each
> platform. So pass the serial device dynamically.
> 
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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