From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Fri, 20 May 2016 11:04:46 +0200 Subject: [U-Boot] [PATCH] arm: mvebu: a38x: Weed out floating point use In-Reply-To: <1462020342-4851-1-git-send-email-marex@denx.de> References: <1462020342-4851-1-git-send-email-marex@denx.de> Message-ID: <573ED32E.2000404@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 30.04.2016 14:45, Marek Vasut wrote: > For reason unknown, recently, the DDR init code writers are really fond > of hiding some small floating point operating deep in their creations. > This patch removes one from the Marvell A38x code. > > Instead of returning size of chip as float from ddr3_get_device_size() > in GiB units, return it as int in MiB units. Since this would interfere > with the huge switch code in ddr3_calc_mem_cs_size(), rework the code > to match the change. > > Before this patch, the cs_mem_size variable could have these values: > ( { 16, 32 } x { 8, 16 } x { 0.01, 0.5, 1, 2, 4, 8 } ) / 8 = > { 0.000000, 0.001250, 0.002500, 0.005000, 0.062500, 0.125000, > 0.250000, 0.500000, 1.000000, 2.000000, 4.000000, } > The switch code checked for a subset of the resulting RAM sizes, which > is in range 128 MiB ... 2048 MiB. > > With this patch, the cs_mem_size variable can have these values: > ( { 16, 32 } x { 8, 16 } x { 0, 512, 1024, 2048, 4096, 8192 } ) / 8 = > { 0, 64, 128, 256, 512, 1024, 2048, 4096 } > To retain previous behavior, filter out 0 MiB (invalid size), 64 MiB > and 4096 MiB options. > > Removing the floating point stuff also saves 1.5k from text segment: > clearfog : spl/u-boot-spl:all -1592 spl/u-boot-spl:text -1592 > > Signed-off-by: Marek Vasut > Cc: Dirk Eibach > Cc: Stefan Roese Marek, thanks for working on this. Applied to u-boot-marvell/master Thanks, Stefan