From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Tue, 24 May 2016 15:04:02 +0200 Subject: [U-Boot] [PATCH V2 01/15] imx-common: introduce simpler macros for runtime dection In-Reply-To: <1463999766-16786-1-git-send-email-van.freenix@gmail.com> References: <1463999766-16786-1-git-send-email-van.freenix@gmail.com> Message-ID: <57445142.2010501@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 23/05/2016 12:35, Peng Fan wrote: > Introduce simpler macros for runtime cpu dection. > > Signed-off-by: Peng Fan > Cc: Stefano Babic > --- > arch/arm/include/asm/imx-common/sys_proto.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h > index 386c2dc..32f95b3 100644 > --- a/arch/arm/include/asm/imx-common/sys_proto.h > +++ b/arch/arm/include/asm/imx-common/sys_proto.h > @@ -24,7 +24,15 @@ > #define is_cpu_type(cpu) (get_cpu_type() == cpu) > #define is_soc_type(soc) (get_soc_type() == soc) > > +#define is_mx6() (is_soc_type(MXC_SOC_MX6)) > +#define is_mx7() (is_soc_type(MXC_SOC_MX7)) > + > #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)) > +#define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) > +#define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6DL)) > +#define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX)) > +#define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL)) > +#define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL)) > > u32 get_nr_cpus(void); > u32 get_cpu_rev(void); > Whole patchset applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================