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From: York Sun <york.sun@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cache
Date: Tue, 24 May 2016 20:33:11 -0700	[thread overview]
Message-ID: <57451CF7.2080706@nxp.com> (raw)
In-Reply-To: <1461000513-15729-1-git-send-email-aneesh.bansal@nxp.com>

On 04/18/2016 05:16 AM, Aneesh Bansal wrote:
> While enabling L2 cache, the value of L2PE (L2 cache parity/ECC
> error checking enable) must not be changed while the L2 cache is
> enabled.
> So, L2PE must be set before enabling L2 cache.
> 
> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
> ---
>  arch/powerpc/cpu/mpc85xx/start.S | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)


Applied to u-boot-mpc85xx master branch, awaiting upstream.

Thanks.

York

      parent reply	other threads:[~2016-05-25  3:33 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-18 17:28 [U-Boot] [PATCH] powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cache Aneesh Bansal
2016-04-19 16:32 ` York Sun
2016-04-20 11:06   ` Aneesh Bansal
2016-04-20 15:28     ` York Sun
2016-04-20 16:27       ` Aneesh Bansal
2016-04-20 16:29         ` York Sun
2016-05-25  3:33 ` York Sun [this message]

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