From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 26 May 2016 18:10:38 +0200 Subject: [U-Boot] [PATCH 1/3] MIPS: Move cache sizes to Kconfig In-Reply-To: <20160526155850.25412-2-paul.burton@imgtec.com> References: <20160526155850.25412-1-paul.burton@imgtec.com> <20160526155850.25412-2-paul.burton@imgtec.com> Message-ID: <57471FFE.50505@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 05/26/2016 05:58 PM, Paul Burton wrote: > Move details of the L1 cache line sizes & total sizes into Kconfig, > defaulting to 0 & using 0 to indicate that the value should be > autodetected. > > Signed-off-by: Paul Burton > --- > > arch/mips/Kconfig | 12 ++++++++++++ > arch/mips/lib/cache.c | 2 +- > arch/mips/lib/cache_init.S | 6 +++--- > board/dbau1x00/Kconfig | 9 +++++++++ > board/micronas/vct/Kconfig | 9 +++++++++ > board/pb1x00/Kconfig | 9 +++++++++ > board/qca/ap121/Kconfig | 9 +++++++++ > board/qca/ap143/Kconfig | 9 +++++++++ > board/qemu-mips/Kconfig | 9 +++++++++ > board/tplink/wdr4300/Kconfig | 9 +++++++++ > include/configs/ap121.h | 5 ----- > include/configs/ap143.h | 5 ----- > include/configs/dbau1x00.h | 7 ------- > include/configs/pb1x00.h | 6 ------ > include/configs/qemu-mips.h | 7 ------- > include/configs/qemu-mips64.h | 7 ------- > include/configs/tplink_wdr4300.h | 5 ----- > include/configs/vct.h | 7 ------- > 18 files changed, 79 insertions(+), 53 deletions(-) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index abaeaf0..13f1164 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -243,6 +243,18 @@ config SWAP_IO_SPACE > config SYS_MIPS_CACHE_INIT_RAM_LOAD > bool > > +config SYS_DCACHE_SIZE > + hex > + default 0 > + > +config SYS_ICACHE_SIZE > + hex > + default 0 > + > +config SYS_CACHELINE_SIZE > + hex > + default 0 > + Please add some short help text to those options. > config MIPS_L1_CACHE_SHIFT_4 > bool > > diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c > index 7482005..7695325 100644 > --- a/arch/mips/lib/cache.c > +++ b/arch/mips/lib/cache.c > @@ -9,7 +9,7 @@ > #include > #include > > -#ifdef CONFIG_SYS_CACHELINE_SIZE > +#if CONFIG_SYS_CACHELINE_SIZE != 0 Wouldn't it make more sense to introduce something like CONFIG_HAVE_CACHE_SUPPORT instead , so you don't need this #if CONFIG_FOO != 0 construct all over the place ? Cool stuff otherwise, thanks! > > static inline unsigned long icache_line_size(void) > { > diff --git a/arch/mips/lib/cache_init.S b/arch/mips/lib/cache_init.S > index 08b7c3a..e4a44ff 100644 > --- a/arch/mips/lib/cache_init.S > +++ b/arch/mips/lib/cache_init.S > @@ -99,14 +99,14 @@ > * > */ > LEAF(mips_cache_reset) > -#ifdef CONFIG_SYS_ICACHE_SIZE > +#if CONFIG_SYS_ICACHE_SIZE != 0 > li t2, CONFIG_SYS_ICACHE_SIZE > li t8, CONFIG_SYS_CACHELINE_SIZE > #else > l1_info t2, t8, MIPS_CONF1_IA_SHF > #endif > > -#ifdef CONFIG_SYS_DCACHE_SIZE > +#if CONFIG_SYS_DCACHE_SIZE != 0 > li t3, CONFIG_SYS_DCACHE_SIZE > li t9, CONFIG_SYS_CACHELINE_SIZE > #else > @@ -116,7 +116,7 @@ LEAF(mips_cache_reset) > #ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD > > /* Determine the largest L1 cache size */ > -#if defined(CONFIG_SYS_ICACHE_SIZE) && defined(CONFIG_SYS_DCACHE_SIZE) > +#if (CONFIG_SYS_ICACHE_SIZE != 0) && (CONFIG_SYS_DCACHE_SIZE != 0) > #if CONFIG_SYS_ICACHE_SIZE > CONFIG_SYS_DCACHE_SIZE > li v0, CONFIG_SYS_ICACHE_SIZE > #else > diff --git a/board/dbau1x00/Kconfig b/board/dbau1x00/Kconfig > index 342ec59..1715a28 100644 > --- a/board/dbau1x00/Kconfig > +++ b/board/dbau1x00/Kconfig > @@ -12,6 +12,15 @@ config SYS_CONFIG_NAME > config SYS_TEXT_BASE > default 0xbfc00000 > > +config SYS_DCACHE_SIZE > + default 16384 > + > +config SYS_ICACHE_SIZE > + default 16384 > + > +config SYS_CACHELINE_SIZE > + default 32 > + > menu "dbau1x00 board options" > > choice > diff --git a/board/micronas/vct/Kconfig b/board/micronas/vct/Kconfig > index 535a77b..5bb6f03 100644 > --- a/board/micronas/vct/Kconfig > +++ b/board/micronas/vct/Kconfig > @@ -12,6 +12,15 @@ config SYS_CONFIG_NAME > config SYS_TEXT_BASE > default 0x87000000 > > +config SYS_DCACHE_SIZE > + default 16384 > + > +config SYS_ICACHE_SIZE > + default 16384 > + > +config SYS_CACHELINE_SIZE > + default 32 > + > menu "vct board options" > > choice > diff --git a/board/pb1x00/Kconfig b/board/pb1x00/Kconfig > index 236a410..27b2ef0 100644 > --- a/board/pb1x00/Kconfig > +++ b/board/pb1x00/Kconfig > @@ -12,4 +12,13 @@ config SYS_CONFIG_NAME > config SYS_TEXT_BASE > default 0x83800000 > > +config SYS_DCACHE_SIZE > + default 16384 > + > +config SYS_ICACHE_SIZE > + default 16384 > + > +config SYS_CACHELINE_SIZE > + default 32 > + > endif > diff --git a/board/qca/ap121/Kconfig b/board/qca/ap121/Kconfig > index c3ecc8f..1ace0e5 100644 > --- a/board/qca/ap121/Kconfig > +++ b/board/qca/ap121/Kconfig > @@ -12,4 +12,13 @@ config SYS_CONFIG_NAME > config SYS_TEXT_BASE > default 0x9f000000 > > +config SYS_DCACHE_SIZE > + default 0x8000 > + > +config SYS_ICACHE_SIZE > + default 0x10000 > + > +config SYS_CACHELINE_SIZE > + default 32 > + > endif > diff --git a/board/qca/ap143/Kconfig b/board/qca/ap143/Kconfig > index 5ea5d6f..ac73782 100644 > --- a/board/qca/ap143/Kconfig > +++ b/board/qca/ap143/Kconfig > @@ -12,4 +12,13 @@ config SYS_CONFIG_NAME > config SYS_TEXT_BASE > default 0x9f000000 > > +config SYS_DCACHE_SIZE > + default 0x8000 > + > +config SYS_ICACHE_SIZE > + default 0x10000 > + > +config SYS_CACHELINE_SIZE > + default 32 > + > endif > diff --git a/board/qemu-mips/Kconfig b/board/qemu-mips/Kconfig > index 3de1f44..66957e7 100644 > --- a/board/qemu-mips/Kconfig > +++ b/board/qemu-mips/Kconfig > @@ -11,4 +11,13 @@ config SYS_TEXT_BASE > default 0xbfc00000 if 32BIT > default 0xffffffffbfc00000 if 64BIT > > +config SYS_DCACHE_SIZE > + default 16384 > + > +config SYS_ICACHE_SIZE > + default 16384 > + > +config SYS_CACHELINE_SIZE > + default 32 > + > endif > diff --git a/board/tplink/wdr4300/Kconfig b/board/tplink/wdr4300/Kconfig > index 65785bd..bbec2e5 100644 > --- a/board/tplink/wdr4300/Kconfig > +++ b/board/tplink/wdr4300/Kconfig > @@ -15,4 +15,13 @@ config SYS_CONFIG_NAME > config SYS_TEXT_BASE > default 0xa1000000 > > +config SYS_DCACHE_SIZE > + default 0x8000 > + > +config SYS_ICACHE_SIZE > + default 0x10000 > + > +config SYS_CACHELINE_SIZE > + default 32 > + > endif > diff --git a/include/configs/ap121.h b/include/configs/ap121.h > index 6f69f31..f069d50 100644 > --- a/include/configs/ap121.h > +++ b/include/configs/ap121.h > @@ -15,11 +15,6 @@ > #define CONFIG_SYS_MHZ 200 > #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) > > -/* Cache Configuration */ > -#define CONFIG_SYS_DCACHE_SIZE 0x8000 > -#define CONFIG_SYS_ICACHE_SIZE 0x10000 > -#define CONFIG_SYS_CACHELINE_SIZE 32 > - > #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE > > #define CONFIG_SYS_MALLOC_LEN 0x40000 > diff --git a/include/configs/ap143.h b/include/configs/ap143.h > index f907c02..e45f743 100644 > --- a/include/configs/ap143.h > +++ b/include/configs/ap143.h > @@ -15,11 +15,6 @@ > #define CONFIG_SYS_MHZ 325 > #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) > > -/* Cache Configuration */ > -#define CONFIG_SYS_DCACHE_SIZE 0x8000 > -#define CONFIG_SYS_ICACHE_SIZE 0x10000 > -#define CONFIG_SYS_CACHELINE_SIZE 32 > - > #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE > > #define CONFIG_SYS_MALLOC_LEN 0x40000 > diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h > index 68d9e36..68ff025 100644 > --- a/include/configs/dbau1x00.h > +++ b/include/configs/dbau1x00.h > @@ -202,11 +202,4 @@ > #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 > #endif /* CONFIG_DBAU1550 */ > > -/*----------------------------------------------------------------------- > - * Cache Configuration > - */ > -#define CONFIG_SYS_DCACHE_SIZE 16384 > -#define CONFIG_SYS_ICACHE_SIZE 16384 > -#define CONFIG_SYS_CACHELINE_SIZE 32 > - > #endif /* __CONFIG_H */ > diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h > index 869768a..b907419 100644 > --- a/include/configs/pb1x00.h > +++ b/include/configs/pb1x00.h > @@ -144,12 +144,6 @@ > #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 > > #endif > -/*----------------------------------------------------------------------- > - * Cache Configuration > - */ > -#define CONFIG_SYS_DCACHE_SIZE 16384 > -#define CONFIG_SYS_ICACHE_SIZE 16384 > -#define CONFIG_SYS_CACHELINE_SIZE 32 > > /* > * BOOTP options > diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h > index 246ee01..f58fc4c 100644 > --- a/include/configs/qemu-mips.h > +++ b/include/configs/qemu-mips.h > @@ -132,11 +132,4 @@ > > #define CONFIG_LZMA > > -/*----------------------------------------------------------------------- > - * Cache Configuration > - */ > -#define CONFIG_SYS_DCACHE_SIZE 16384 > -#define CONFIG_SYS_ICACHE_SIZE 16384 > -#define CONFIG_SYS_CACHELINE_SIZE 32 > - > #endif /* __CONFIG_H */ > diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h > index 60a3a71..2190d16 100644 > --- a/include/configs/qemu-mips64.h > +++ b/include/configs/qemu-mips64.h > @@ -132,11 +132,4 @@ > > #define CONFIG_LZMA > > -/*----------------------------------------------------------------------- > - * Cache Configuration > - */ > -#define CONFIG_SYS_DCACHE_SIZE 16384 > -#define CONFIG_SYS_ICACHE_SIZE 16384 > -#define CONFIG_SYS_CACHELINE_SIZE 32 > - > #endif /* __CONFIG_H */ > diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h > index 09a69fe..6273711 100644 > --- a/include/configs/tplink_wdr4300.h > +++ b/include/configs/tplink_wdr4300.h > @@ -15,11 +15,6 @@ > #define CONFIG_SYS_MHZ 280 > #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) > > -/* Cache Configuration */ > -#define CONFIG_SYS_DCACHE_SIZE 0x8000 > -#define CONFIG_SYS_ICACHE_SIZE 0x10000 > -#define CONFIG_SYS_CACHELINE_SIZE 32 > - > #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE > > #define CONFIG_SYS_MALLOC_LEN 0x40000 > diff --git a/include/configs/vct.h b/include/configs/vct.h > index 68eb089..cc5e354 100644 > --- a/include/configs/vct.h > +++ b/include/configs/vct.h > @@ -204,13 +204,6 @@ > #endif /* CONFIG_VCT_ONENAND */ > > /* > - * Cache Configuration > - */ > -#define CONFIG_SYS_DCACHE_SIZE 16384 > -#define CONFIG_SYS_ICACHE_SIZE 16384 > -#define CONFIG_SYS_CACHELINE_SIZE 32 > - > -/* > * I2C/EEPROM > */ > #define CONFIG_SYS_I2C > -- Best regards, Marek Vasut