From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Fri, 27 May 2016 16:32:26 +0200 Subject: [U-Boot] [PATCH 1/3] MIPS: Move cache sizes to Kconfig In-Reply-To: <20160527103634.GB10442@NP-P-BURTON> References: <20160526155850.25412-1-paul.burton@imgtec.com> <20160526155850.25412-2-paul.burton@imgtec.com> <57471FFE.50505@denx.de> <20160527103634.GB10442@NP-P-BURTON> Message-ID: <57485A7A.3050805@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 05/27/2016 12:36 PM, Paul Burton wrote: > On Thu, May 26, 2016 at 06:10:38PM +0200, Marek Vasut wrote: >>> diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c >>> index 7482005..7695325 100644 >>> --- a/arch/mips/lib/cache.c >>> +++ b/arch/mips/lib/cache.c >>> @@ -9,7 +9,7 @@ >>> #include >>> #include >>> >>> -#ifdef CONFIG_SYS_CACHELINE_SIZE >>> +#if CONFIG_SYS_CACHELINE_SIZE != 0 >> >> Wouldn't it make more sense to introduce something like >> CONFIG_HAVE_CACHE_SUPPORT instead , so you don't need this >> #if CONFIG_FOO != 0 construct all over the place ? > > Hi Marek, > > It's not about whether cache support is present (we always build cache > support), it's about whether we are hardcoding the sizes of the caches > or detecting them at runtime. The latter is especially useful on > FPGA-based platforms like Malta where the CPU (& caches) can change. I > suppose I could add something like CONFIG_SYS_CACHE_SIZE_AUTO, but I > still think it would be cleanest to have that default to a value based > upon whether a board has set a non-zero size for any of the caches. Auto-detecting cacheline size is cool, but that'd need much more work. Just grep through drivers/ for CONFIG_SYS_CACHELINE_SIZE and you'll see a lot of code depends on non-zero value in it. Setting it to zero will just bite you at some point in a nasty way. >> Cool stuff otherwise, thanks! > > Thanks, > Paul > -- Best regards, Marek Vasut