From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Wed, 1 Jun 2016 08:49:41 -0700 Subject: [U-Boot] [PATCH 1/2] drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl In-Reply-To: References: <1462328422-37229-1-git-send-email-Shengzhou.Liu@nxp.com> <5739FB6E.1020306@nxp.com> <574DB5DE.2030208@nxp.com> Message-ID: <574F0415.9090506@nxp.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 05/31/2016 10:12 PM, Shengzhou Liu wrote: >> -----Original Message----- >> From: York Sun [mailto:york.sun at nxp.com] >> Sent: Wednesday, June 01, 2016 12:04 AM >> To: Shengzhou Liu ; u-boot at lists.denx.de >> Shengzhou, >> >> If you have to use an odd number for clk_adj, we can go ahead to merge >> these patches. In my experience, clk_adj is very forgivable. If you have only >> one value works, there is probably something wrong. >> >> York >> > York, > The odd clk_adj = 9 is the optimal with timing centralization, maybe it work if set it to 8, but not the optimal. > Theoretically we should have the actual value instead of dividing 2 to avoid confusion for customers. > Shengzhou > OK. Thanks for the explanation. York