From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 02 Jun 2016 14:48:23 +0200 Subject: [U-Boot] [PATCH v2 1/5] arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper In-Reply-To: <1464850458-2850-2-git-send-email-sriram.dash@nxp.com> References: <1464850458-2850-1-git-send-email-sriram.dash@nxp.com> <1464850458-2850-2-git-send-email-sriram.dash@nxp.com> Message-ID: <57502B17.2080301@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 06/02/2016 08:54 AM, Sriram Dash wrote: Commit message is missing, please fix > Signed-off-by: Sriram Dash > Signed-off-by: Rajesh Bhagat > --- > Changes in v2: > - No update > > arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 7 +++++++ > arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++ > arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 3 +++ > arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 ++ > 4 files changed, 14 insertions(+) > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > index 9a5a6b5..9c575c1 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > @@ -528,6 +528,13 @@ u32 fsl_qoriq_core_to_type(unsigned int core) > return -1; /* cannot identify the cluster */ > } > > +uint get_svr(void) > +{ > + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); > + > + return gur_in32(&gur->svr); > +} > + > #ifdef CONFIG_DISPLAY_CPUINFO > int print_cpuinfo(void) > { > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h > index 57b99d4..4151994 100644 > --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h > +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h > @@ -592,4 +592,6 @@ struct ccsr_cci400 { > #define SCR0_CLIENTPD_MASK 0x00000001 > #define SCR0_USFCFG_MASK 0x00000400 > > +uint get_svr(void); > + > #endif /* __ARCH_FSL_LSCH2_IMMAP_H__*/ > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > index 65b3357..e48bbaf 100644 > --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > @@ -319,4 +319,7 @@ struct ccsr_reset { > u32 ip_rev1; /* 0xbf8 */ > u32 ip_rev2; /* 0xbfc */ > }; > + > +uint get_svr(void); > + > #endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */ > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h > index 831d817..3f1a0a8 100644 > --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h > +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h > @@ -52,6 +52,8 @@ struct cpu_type { > #define SVR_MIN(svr) (((svr) >> 0) & 0xf) > #define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E) > #define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1)) > +#define IS_SVR_REV(svr, maj, min) \ > + ((SVR_MAJ(svr) == maj) && (SVR_MIN(svr) == min)) > > /* ahci port register default value */ > #define AHCI_PORT_PHY_1_CFG 0xa003fffe > -- Best regards, Marek Vasut