From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <york.sun@nxp.com>
Date: Sat, 4 Jun 2016 08:57:36 -0700
Subject: [U-Boot] [PATCH] board/freescale: Use unified setup_ddr_tlbs
 for spl boot and non-spl boot
In-Reply-To: <1464680346-28821-1-git-send-email-Shengzhou.Liu@nxp.com>
References: <1464680346-28821-1-git-send-email-Shengzhou.Liu@nxp.com>
Message-ID: <5752FA70.4050703@nxp.com>
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To: u-boot@lists.denx.de

On 05/31/2016 12:49 AM, Shengzhou Liu wrote:
> We should use unified setup_ddr_tlbs() for spl boot and non-spl boot
> to make sure 'M' bit is set for DDR TLB to maintain cache coherence.
> 
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
> ---
>  board/freescale/b4860qds/ddr.c | 8 +++-----
>  board/freescale/t102xqds/ddr.c | 5 ++---
>  board/freescale/t102xrdb/ddr.c | 4 ++--
>  board/freescale/t104xrdb/ddr.c | 7 ++-----
>  board/freescale/t208xqds/ddr.c | 5 ++---
>  board/freescale/t208xrdb/ddr.c | 6 +++---
>  board/freescale/t4qds/ddr.c    | 7 +++----
>  board/freescale/t4rdb/ddr.c    | 5 ++---
>  8 files changed, 19 insertions(+), 28 deletions(-)
> 


Applied to u-boot-mpc85xx master. Awaiting upstream.
Thanks.

York