[U-Boot] [PATCH 0/3] Add USB EHCI support for ls1012aqds

[U-Boot] [PATCH 0/3] Add USB EHCI support for ls1012aqds

[Rajesh Bhagat]

Adds USB EHCI support for ls1012qds by adding the support 
for NXP ULPI PHY and adding the support it configuration
files. Also enables, USB2 IP in ns access defines. 

Rajesh Bhagat (3):
  drivers: usb: fsl: add USB ULPI init code
  config: ls1012aqds: Add USB EHCI support for ls1012aqds
  armv8: ls1012a: Added CSU assignment for USB2

 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |    1 +
 .../include/asm/arch-fsl-layerscape/ns_access.h    |    2 +
 drivers/usb/host/ehci-fsl.c                        |   21 ++++++++++++++++++++
 include/configs/ls1012aqds.h                       |    5 ++++
 include/usb/ehci-ci.h                              |    2 +-
 5 files changed, 30 insertions(+), 1 deletions(-)

-- 
1.7.7.4

[U-Boot] [PATCH 1/3] drivers: usb: fsl: add USB ULPI init code

[Rajesh Bhagat]

This adds the required code to set up a ULPI USB port, for
new NXP USB PHY used in QorIQ platforms.

To use this both CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT
have to be set in the board configuration file.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
---
 drivers/usb/host/ehci-fsl.c |   21 +++++++++++++++++++++
 1 files changed, 21 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index a43d37d..897f453 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -16,6 +16,9 @@
 #include <hwconfig.h>
 #include <fsl_usb.h>
 #include <fdt_support.h>
+#ifdef CONFIG_USB_ULPI
+#include <usb/ulpi.h>
+#endif
 
 #include "ehci.h"
 
@@ -50,6 +53,10 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 	const char *phy_type = NULL;
 	size_t len;
 	char current_usb_controller[5];
+#ifdef CONFIG_USB_ULPI
+	int ret;
+	struct ulpi_viewport ulpi_vp;
+#endif
 #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 	char usb_phy[5];
 
@@ -126,6 +133,20 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 		udelay(1000); /* delay required for PHY Clk to appear */
 		if (!usb_phy_clk_valid(ehci))
 			return -EINVAL;
+
+#ifdef CONFIG_USB_ULPI
+		ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint;
+		ulpi_vp.port_num = 0;
+
+		ret = ulpi_init(&ulpi_vp);
+		if (ret) {
+			puts("NXP ULPI viewport init failed\n");
+			return -1;
+		}
+
+		ulpi_set_vbus(&ulpi_vp, 1, 1);
+		ulpi_set_vbus_indicator(&ulpi_vp, 1, 1, 1);
+#endif
 		out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
 	}
 
-- 
1.7.7.4

[U-Boot] [PATCH 1/3] drivers: usb: fsl: add USB ULPI init code

[Marek Vasut]

On 06/08/2016 10:22 AM, Rajesh Bhagat wrote:
> This adds the required code to set up a ULPI USB port, for
> new NXP USB PHY used in QorIQ platforms.
> 
> To use this both CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT
> have to be set in the board configuration file.
> 
> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
> ---
>  drivers/usb/host/ehci-fsl.c |   21 +++++++++++++++++++++
>  1 files changed, 21 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index a43d37d..897f453 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -16,6 +16,9 @@
>  #include <hwconfig.h>
>  #include <fsl_usb.h>
>  #include <fdt_support.h>
> +#ifdef CONFIG_USB_ULPI
> +#include <usb/ulpi.h>
> +#endif
>  
>  #include "ehci.h"
>  
> @@ -50,6 +53,10 @@ int ehci_hcd_init(int index, enum usb_init_type init,
>  	const char *phy_type = NULL;
>  	size_t len;
>  	char current_usb_controller[5];
> +#ifdef CONFIG_USB_ULPI
> +	int ret;
> +	struct ulpi_viewport ulpi_vp;
> +#endif
>  #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
>  	char usb_phy[5];
>  
> @@ -126,6 +133,20 @@ int ehci_hcd_init(int index, enum usb_init_type init,
>  		udelay(1000); /* delay required for PHY Clk to appear */
>  		if (!usb_phy_clk_valid(ehci))
>  			return -EINVAL;
> +
> +#ifdef CONFIG_USB_ULPI
> +		ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint;
> +		ulpi_vp.port_num = 0;
> +
> +		ret = ulpi_init(&ulpi_vp);
> +		if (ret) {
> +			puts("NXP ULPI viewport init failed\n");
> +			return -1;

return ret;

> +		}
> +
> +		ulpi_set_vbus(&ulpi_vp, 1, 1);
> +		ulpi_set_vbus_indicator(&ulpi_vp, 1, 1, 1);
> +#endif
>  		out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
>  	}
>  
> 


-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH 1/3] drivers: usb: fsl: add USB ULPI init code

[Rajesh Bhagat]

> -----Original Message-----
> From: Marek Vasut [mailto:marex at denx.de]
> Sent: Wednesday, June 08, 2016 7:29 PM
> To: Rajesh Bhagat <rajesh.bhagat@nxp.com>; u-boot at lists.denx.de
> Cc: Sriram Dash <sriram.dash@nxp.com>; albert.u.boot at aribaud.net;
> prabhakar at freescale.com; york sun <york.sun@nxp.com>; Rajat Srivastava
> <rajat.srivastava@nxp.com>
> Subject: Re: [PATCH 1/3] drivers: usb: fsl: add USB ULPI init code
> 
> On 06/08/2016 10:22 AM, Rajesh Bhagat wrote:
> > This adds the required code to set up a ULPI USB port, for new NXP USB
> > PHY used in QorIQ platforms.
> >
> > To use this both CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT have to
> > be set in the board configuration file.
> >
> > Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
> > ---
> >  drivers/usb/host/ehci-fsl.c |   21 +++++++++++++++++++++
> >  1 files changed, 21 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> > index a43d37d..897f453 100644
> > --- a/drivers/usb/host/ehci-fsl.c
> > +++ b/drivers/usb/host/ehci-fsl.c
> > @@ -16,6 +16,9 @@
> >  #include <hwconfig.h>
> >  #include <fsl_usb.h>
> >  #include <fdt_support.h>
> > +#ifdef CONFIG_USB_ULPI
> > +#include <usb/ulpi.h>
> > +#endif
> >
> >  #include "ehci.h"
> >
> > @@ -50,6 +53,10 @@ int ehci_hcd_init(int index, enum usb_init_type init,
> >  	const char *phy_type = NULL;
> >  	size_t len;
> >  	char current_usb_controller[5];
> > +#ifdef CONFIG_USB_ULPI
> > +	int ret;
> > +	struct ulpi_viewport ulpi_vp;
> > +#endif
> >  #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
> >  	char usb_phy[5];
> >
> > @@ -126,6 +133,20 @@ int ehci_hcd_init(int index, enum usb_init_type init,
> >  		udelay(1000); /* delay required for PHY Clk to appear */
> >  		if (!usb_phy_clk_valid(ehci))
> >  			return -EINVAL;
> > +
> > +#ifdef CONFIG_USB_ULPI
> > +		ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint;
> > +		ulpi_vp.port_num = 0;
> > +
> > +		ret = ulpi_init(&ulpi_vp);
> > +		if (ret) {
> > +			puts("NXP ULPI viewport init failed\n");
> > +			return -1;

Hello Marek, 

> 
> return ret;
> 

Will take care in v2. 

Best Regards,
Rajesh Bhagat 

> > +		}
> > +
> > +		ulpi_set_vbus(&ulpi_vp, 1, 1);
> > +		ulpi_set_vbus_indicator(&ulpi_vp, 1, 1, 1); #endif
> >  		out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
> >  	}
> >
> >
> 
> 
> --
> Best regards,
> Marek Vasut

[U-Boot] [PATCH 2/3] config: ls1012aqds: Add USB EHCI support for ls1012aqds

[Rajesh Bhagat]

Add USB EHCI support for ls1012aqds platform

Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
---
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |    1 +
 include/configs/ls1012aqds.h                       |    5 +++++
 include/usb/ehci-ci.h                              |    2 +-
 3 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 0c87c2f..b1637da 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -34,6 +34,7 @@
 #define CONFIG_SYS_XHCI_USB1_ADDR		(CONFIG_SYS_IMMR + 0x01f00000)
 #define CONFIG_SYS_XHCI_USB2_ADDR		(CONFIG_SYS_IMMR + 0x02000000)
 #define CONFIG_SYS_XHCI_USB3_ADDR		(CONFIG_SYS_IMMR + 0x02100000)
+#define CONFIG_SYS_EHCI_USB1_ADDR		(CONFIG_SYS_IMMR + 0x07600000)
 #define CONFIG_SYS_PCIE1_ADDR			(CONFIG_SYS_IMMR + 0x2400000)
 #define CONFIG_SYS_PCIE2_ADDR			(CONFIG_SYS_IMMR + 0x2500000)
 #define CONFIG_SYS_PCIE3_ADDR			(CONFIG_SYS_IMMR + 0x2600000)
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index fcf402c..482a6d7 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -117,6 +117,8 @@
 #ifdef CONFIG_HAS_FSL_DR_USB
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_FSL
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 
@@ -127,6 +129,9 @@
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
+#endif
+
+#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)
 #define CONFIG_USB_STORAGE
 #endif
 
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 882aed4..38d557c 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -159,7 +159,7 @@
 #elif defined(CONFIG_MPC512X)
 #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR
 #define CONFIG_SYS_FSL_USB2_ADDR	0
-#elif defined(CONFIG_LS102XA)
+#elif defined(CONFIG_LS102XA) || defined(CONFIG_LS1012A)
 #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR
 #define CONFIG_SYS_FSL_USB2_ADDR        0
 #endif
-- 
1.7.7.4

[U-Boot] [PATCH 3/3] armv8: ls1012a: Added CSU assignment for USB2

[Rajesh Bhagat]

Access settings for USB2 IP is added through CSU register.

Added CSU ID for USB2, reg: CSL23_REG[8:0]

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
---
 .../include/asm/arch-fsl-layerscape/ns_access.h    |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index db76066..b7da381 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -38,6 +38,7 @@ enum csu_cslx_ind {
 	CSU_CSLX_ESDHC,
 	CSU_CSLX_IFC = 45,
 	CSU_CSLX_I2C1,
+	CSU_CSLX_USB_2,
 	CSU_CSLX_I2C3 = 48,
 	CSU_CSLX_I2C2,
 	CSU_CSLX_DUART2 = 50,
@@ -117,6 +118,7 @@ static struct csu_ns_dev ns_dev[] = {
 	 {CSU_CSLX_ESDHC, CSU_ALL_RW},
 	 {CSU_CSLX_IFC, CSU_ALL_RW},
 	 {CSU_CSLX_I2C1, CSU_ALL_RW},
+	 {CSU_CSLX_USB_2, CSU_ALL_RW},
 	 {CSU_CSLX_I2C3, CSU_ALL_RW},
 	 {CSU_CSLX_I2C2, CSU_ALL_RW},
 	 {CSU_CSLX_DUART2, CSU_ALL_RW},
-- 
1.7.7.4