From: York Sun <york.sun@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5] armv8/ls2080a: configure PMU's PCTBENR to enable WDT
Date: Fri, 10 Jun 2016 15:22:50 -0700 [thread overview]
Message-ID: <575B3DBA.4010507@nxp.com> (raw)
In-Reply-To: <1465353102-42403-1-git-send-email-B56489@freescale.com>
On 06/07/2016 07:42 PM, Yunhui Cui wrote:
> From: Yunhui Cui <yunhui.cui@nxp.com>
>
> The SP805-WDT module on LS2080A and LS2085A, requires configuration
> of PMU's PCTBENR register to enable watchdog counter decrement and
> reset signal generation. In order not to affect the sp805wdt driver
> frame, we enable the watchdog clk in advance.
>
> Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
> ---
> arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 12 ++++++++++++
> arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
> 2 files changed, 13 insertions(+)
Applied to fsl-qoriq master. Awaiting upstream. Thanks.
York
prev parent reply other threads:[~2016-06-10 22:22 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-08 2:31 [U-Boot] [PATCH v5] armv8/ls2080a: configure PMU's PCTBENR to enable WDT Yunhui Cui
2016-06-10 22:22 ` York Sun [this message]
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