From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <york.sun@nxp.com>
Date: Fri, 10 Jun 2016 15:22:50 -0700
Subject: [U-Boot] [PATCH v5] armv8/ls2080a: configure PMU's PCTBENR to
	enable WDT
In-Reply-To: <1465353102-42403-1-git-send-email-B56489@freescale.com>
References: <1465353102-42403-1-git-send-email-B56489@freescale.com>
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On 06/07/2016 07:42 PM, Yunhui Cui wrote:
> From: Yunhui Cui <yunhui.cui@nxp.com>
> 
> The SP805-WDT module on LS2080A and LS2085A, requires configuration
> of PMU's PCTBENR register to enable watchdog counter decrement and
> reset signal generation. In order not to affect the sp805wdt driver
> frame, we enable the watchdog clk in advance.
> 
> Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c                | 12 ++++++++++++
>  arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h |  1 +
>  2 files changed, 13 insertions(+)

Applied to fsl-qoriq master. Awaiting upstream. Thanks.

York