* [U-Boot] [RESEND PATCH] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
@ 2016-07-06 4:56 Vignesh R
2016-07-06 5:57 ` Mugunthan V N
0 siblings, 1 reply; 3+ messages in thread
From: Vignesh R @ 2016-07-06 4:56 UTC (permalink / raw)
To: u-boot
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
arch/arm/dts/dra7-evm.dts | 6 ++----
arch/arm/dts/dra72-evm.dts | 6 ++----
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index 08ef04e177b0..429b9edc1b2b 100644
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -491,15 +491,13 @@
pinctrl-names = "default";
pinctrl-0 = <&qspi1_pins>;
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
m25p80 at 0 {
compatible = "s25fl256s1","spi-flash";
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
- spi-cpol;
- spi-cpha;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts
index 205103e2b0e1..ced2f1166d8c 100644
--- a/arch/arm/dts/dra72-evm.dts
+++ b/arch/arm/dts/dra72-evm.dts
@@ -603,15 +603,13 @@
pinctrl-names = "default";
pinctrl-0 = <&qspi1_pins>;
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
m25p80 at 0 {
compatible = "s25fl256s1","spi-flash";
- spi-max-frequency = <48000000>;
+ spi-max-frequency = <64000000>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
- spi-cpol;
- spi-cpha;
#address-cells = <1>;
#size-cells = <1>;
--
2.9.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [RESEND PATCH] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
2016-07-06 4:56 [U-Boot] [RESEND PATCH] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz Vignesh R
@ 2016-07-06 5:57 ` Mugunthan V N
2016-07-06 7:37 ` Jagan Teki
0 siblings, 1 reply; 3+ messages in thread
From: Mugunthan V N @ 2016-07-06 5:57 UTC (permalink / raw)
To: u-boot
On Wednesday 06 July 2016 10:26 AM, Vignesh R wrote:
> According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
> DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
> MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
> throughput.
>
> Signed-off-by: Vignesh R <vigneshr@ti.com>
> Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Regards
Mugunthan V N
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [RESEND PATCH] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
2016-07-06 5:57 ` Mugunthan V N
@ 2016-07-06 7:37 ` Jagan Teki
0 siblings, 0 replies; 3+ messages in thread
From: Jagan Teki @ 2016-07-06 7:37 UTC (permalink / raw)
To: u-boot
On 6 July 2016 at 11:27, Mugunthan V N <mugunthanvnm@ti.com> wrote:
> On Wednesday 06 July 2016 10:26 AM, Vignesh R wrote:
>> According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
>> DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
>> MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
>> throughput.
>>
>> Signed-off-by: Vignesh R <vigneshr@ti.com>
>> Reviewed-by: Tom Rini <trini@konsulko.com>
>
> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Applied to u-boot-spi/master
--
Jagan.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2016-07-06 7:37 UTC | newest]
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2016-07-06 4:56 [U-Boot] [RESEND PATCH] ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz Vignesh R
2016-07-06 5:57 ` Mugunthan V N
2016-07-06 7:37 ` Jagan Teki
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