[U-Boot] [PATCH] sunxi: mmc: increase status register polling rate for data transfers

[U-Boot] [PATCH] sunxi: mmc: increase status register polling rate for data transfers

[Tobias Doerffel]

With a recent bunch of SD3.0 cards in our A20-based board we
experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s
with previous cards from the same vendor (both 4 GB/class 10). By
increasing status register polling rate from 1 kHz to 1 MHz we were
able to reach the original transfer rates again. With the old cards
we now even reach about 16 MiB/s.

Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de>
---
 drivers/mmc/sunxi_mmc.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index ce2dc4a..36da3b3 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -269,18 +269,18 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)
 	unsigned i;
 	unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
 	unsigned byte_cnt = data->blocksize * data->blocks;
-	unsigned timeout_msecs = byte_cnt >> 8;
-	if (timeout_msecs < 2000)
-		timeout_msecs = 2000;
+	unsigned timeout_usecs = ( byte_cnt >> 8 ) * 1000;
+	if (timeout_usecs < 2000000)
+		timeout_usecs = 2000000;
 
 	/* Always read / write data through the CPU */
 	setbits_le32(&mmchost->reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);
 
 	for (i = 0; i < (byte_cnt >> 2); i++) {
 		while (readl(&mmchost->reg->status) & status_bit) {
-			if (!timeout_msecs--)
+			if (!timeout_usecs--)
 				return -1;
-			udelay(1000);
+			udelay(1);
 		}
 
 		if (reading)
-- 
2.1.4

[U-Boot] [PATCH] sunxi: mmc: increase status register polling rate for data transfers

[Jaehoon Chung]

Hi Tobias,

On 07/05/2016 05:31 PM, Tobias Doerffel wrote:
> With a recent bunch of SD3.0 cards in our A20-based board we
> experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s
> with previous cards from the same vendor (both 4 GB/class 10). By
> increasing status register polling rate from 1 kHz to 1 MHz we were
> able to reach the original transfer rates again. With the old cards
> we now even reach about 16 MiB/s.
> 
> Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de>
> ---
>  drivers/mmc/sunxi_mmc.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> index ce2dc4a..36da3b3 100644
> --- a/drivers/mmc/sunxi_mmc.c
> +++ b/drivers/mmc/sunxi_mmc.c
> @@ -269,18 +269,18 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)
>  	unsigned i;
>  	unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
>  	unsigned byte_cnt = data->blocksize * data->blocks;
> -	unsigned timeout_msecs = byte_cnt >> 8;
> -	if (timeout_msecs < 2000)
> -		timeout_msecs = 2000;
> +	unsigned timeout_usecs = ( byte_cnt >> 8 ) * 1000;

ERROR: space prohibited after that open parenthesis '('
#31: FILE: drivers/mmc/sunxi_mmc.c:272:
+       unsigned timeout_usecs = ( byte_cnt >> 8 ) * 1000;

ERROR: space prohibited before that close parenthesis ')'
#31: FILE: drivers/mmc/sunxi_mmc.c:272:
+       unsigned timeout_usecs = ( byte_cnt >> 8 ) * 1000;

Best Regards,
Jaehoon Chung

> +	if (timeout_usecs < 2000000)
> +		timeout_usecs = 2000000;
>  
>  	/* Always read / write data through the CPU */
>  	setbits_le32(&mmchost->reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);
>  
>  	for (i = 0; i < (byte_cnt >> 2); i++) {
>  		while (readl(&mmchost->reg->status) & status_bit) {
> -			if (!timeout_msecs--)
> +			if (!timeout_usecs--)
>  				return -1;
> -			udelay(1000);
> +			udelay(1);
>  		}
>  
>  		if (reading)
>