* [U-Boot] [bug report]cmd: cache: output information
@ 2016-07-23 6:31 jk
2016-07-26 2:47 ` Simon Glass
0 siblings, 1 reply; 4+ messages in thread
From: jk @ 2016-07-23 6:31 UTC (permalink / raw)
To: u-boot
Hi guys,
I think the output of command 'dcache' is improper. It always print
'writethrough' regardless of the real policy, such as write back.
=> dcache
Data (writethrough) Cache is ON
Not only ARM but also other socs support cache, hence we can't
differentiate policy by macro (i.e CONFIG_SYS_ARM_CACHE_WRITETHROUGH).
Can you think of anything better?
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [bug report]cmd: cache: output information
2016-07-23 6:31 [U-Boot] [bug report]cmd: cache: output information jk
@ 2016-07-26 2:47 ` Simon Glass
2016-07-26 2:56 ` jk
0 siblings, 1 reply; 4+ messages in thread
From: Simon Glass @ 2016-07-26 2:47 UTC (permalink / raw)
To: u-boot
Hi,
On 23 July 2016 at 00:31, jk <jk.kernel@gmail.com> wrote:
> Hi guys,
>
> I think the output of command 'dcache' is improper. It always print
> 'writethrough' regardless of the real policy, such as write back.
>
> => dcache
> Data (writethrough) Cache is ON
>
> Not only ARM but also other socs support cache, hence we can't differentiate
> policy by macro (i.e CONFIG_SYS_ARM_CACHE_WRITETHROUGH).
> Can you think of anything better?
>
I'm sure it could be improved. Perhaps it could also be done in a
generic way so it works on all archs. Do you want to send a patch?
Regards,
Simon
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [bug report]cmd: cache: output information
2016-07-26 2:47 ` Simon Glass
@ 2016-07-26 2:56 ` jk
2016-08-01 1:01 ` Simon Glass
0 siblings, 1 reply; 4+ messages in thread
From: jk @ 2016-07-26 2:56 UTC (permalink / raw)
To: u-boot
Hi Simon,
I'm not very familiar with other archs except, hence I'm not able to
implement it.:-(
Regards,
Ziyuan Xu
On 2016?07?26? 10:47, Simon Glass wrote:
> Hi,
>
> On 23 July 2016 at 00:31, jk <jk.kernel@gmail.com> wrote:
>> Hi guys,
>>
>> I think the output of command 'dcache' is improper. It always print
>> 'writethrough' regardless of the real policy, such as write back.
>>
>> => dcache
>> Data (writethrough) Cache is ON
>>
>> Not only ARM but also other socs support cache, hence we can't differentiate
>> policy by macro (i.e CONFIG_SYS_ARM_CACHE_WRITETHROUGH).
>> Can you think of anything better?
>>
> I'm sure it could be improved. Perhaps it could also be done in a
> generic way so it works on all archs. Do you want to send a patch?
>
> Regards,
> Simon
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [bug report]cmd: cache: output information
2016-07-26 2:56 ` jk
@ 2016-08-01 1:01 ` Simon Glass
0 siblings, 0 replies; 4+ messages in thread
From: Simon Glass @ 2016-08-01 1:01 UTC (permalink / raw)
To: u-boot
Hi Ziyuan,
On 25 July 2016 at 20:56, jk <jk.kernel@gmail.com> wrote:
> Hi Simon,
>
> I'm not very familiar with other archs except, hence I'm not able to
> implement it.:-(
Well a patch for ARM would be useful. I'm sure other people could add
to it later.
Regards,
Simon
>
> Regards,
> Ziyuan Xu
>
>
> On 2016?07?26? 10:47, Simon Glass wrote:
>>
>> Hi,
>>
>> On 23 July 2016 at 00:31, jk <jk.kernel@gmail.com> wrote:
>>>
>>> Hi guys,
>>>
>>> I think the output of command 'dcache' is improper. It always print
>>> 'writethrough' regardless of the real policy, such as write back.
>>>
>>> => dcache
>>> Data (writethrough) Cache is ON
>>>
>>> Not only ARM but also other socs support cache, hence we can't
>>> differentiate
>>> policy by macro (i.e CONFIG_SYS_ARM_CACHE_WRITETHROUGH).
>>> Can you think of anything better?
>>>
>> I'm sure it could be improved. Perhaps it could also be done in a
>> generic way so it works on all archs. Do you want to send a patch?
>>
>> Regards,
>> Simon
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-08-01 1:01 UTC | newest]
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2016-07-23 6:31 [U-Boot] [bug report]cmd: cache: output information jk
2016-07-26 2:47 ` Simon Glass
2016-07-26 2:56 ` jk
2016-08-01 1:01 ` Simon Glass
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