From mboxrd@z Thu Jan  1 00:00:00 1970
From: jk <jk.kernel@gmail.com>
Date: Tue, 26 Jul 2016 10:56:14 +0800
Subject: [U-Boot] [bug report]cmd: cache: output information
In-Reply-To: <CAPnjgZ1j9sqx9sFXB_U3cV3c4KYFbV=8TseUy=7iVM5y6J28cw@mail.gmail.com>
References: <57930F5D.5070605@gmail.com>
 <CAPnjgZ1j9sqx9sFXB_U3cV3c4KYFbV=8TseUy=7iVM5y6J28cw@mail.gmail.com>
Message-ID: <5796D14E.2010509@gmail.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

Hi Simon,

I'm not very familiar with other archs except, hence I'm not able to 
implement it.:-(

Regards,
Ziyuan Xu

On 2016?07?26? 10:47, Simon Glass wrote:
> Hi,
>
> On 23 July 2016 at 00:31, jk <jk.kernel@gmail.com> wrote:
>> Hi guys,
>>
>> I think the output of command 'dcache' is improper. It always print
>> 'writethrough' regardless of the real policy, such as write back.
>>
>> => dcache
>> Data (writethrough) Cache is ON
>>
>> Not only ARM but also other socs support cache, hence we can't differentiate
>> policy by macro (i.e CONFIG_SYS_ARM_CACHE_WRITETHROUGH).
>> Can you think of anything better?
>>
> I'm sure it could be improved. Perhaps it could also be done in a
> generic way so it works on all archs. Do you want to send a patch?
>
> Regards,
> Simon