[U-Boot] [PATCH 0/4] rk3399: enable dwc3 gadget and fastboot

[U-Boot] [PATCH 0/4] rk3399: enable dwc3 gadget and fastboot

[Kever Yang]

This patch set enable rk3399 dwc3 controller and gadget driver
for fastboot.



Kever Yang (4):
  rk3399: add a empty "sys_proto.h" header file
  board: evb-rk3399: add api to support dwc3 gadget
  usb: dwc3: add support for 16 bit UTMI+ interface
  config: rk3399: add support for dwc3 gadget

 arch/arm/include/asm/arch-rockchip/sys_proto.h | 10 ++++++++++
 board/rockchip/evb_rk3399/evb-rk3399.c         | 22 ++++++++++++++++++++++
 drivers/usb/dwc3/core.c                        | 10 ++++++++++
 drivers/usb/dwc3/core.h                        | 11 +++++++++++
 include/configs/rk3399_common.h                | 21 +++++++++++++++++++++
 5 files changed, 74 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-rockchip/sys_proto.h

-- 
1.9.1

[U-Boot] [PATCH 1/4] rk3399: add a empty "sys_proto.h" header file

[Kever Yang]

driver/usb/dwc3/gadget.c need a "sys_proto.h" header file, add a
empty one to make compile success.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/include/asm/arch-rockchip/sys_proto.h | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-rockchip/sys_proto.h

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
new file mode 100644
index 0000000..35423e1
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -0,0 +1,10 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co.,Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SYS_PROTO_H
+#define _ASM_ARCH_SYS_PROTO_H
+
+#endif /* _ASM_ARCH_SYS_PROTO_H */
-- 
1.9.1

[U-Boot] [PATCH 1/4] rk3399: add a empty "sys_proto.h" header file

[Kever Yang]

+ Simon,

On 08/16/2016 06:03 PM, Kever Yang wrote:
> driver/usb/dwc3/gadget.c need a "sys_proto.h" header file, add a
> empty one to make compile success.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>   arch/arm/include/asm/arch-rockchip/sys_proto.h | 10 ++++++++++
>   1 file changed, 10 insertions(+)
>   create mode 100644 arch/arm/include/asm/arch-rockchip/sys_proto.h
>
> diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
> new file mode 100644
> index 0000000..35423e1
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
> @@ -0,0 +1,10 @@
> +/*
> + * (C) Copyright 2016 Rockchip Electronics Co.,Ltd
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef _ASM_ARCH_SYS_PROTO_H
> +#define _ASM_ARCH_SYS_PROTO_H
> +
> +#endif /* _ASM_ARCH_SYS_PROTO_H */

[U-Boot] [PATCH 1/4] rk3399: add a empty "sys_proto.h" header file

[Simon Glass]

On 16 August 2016 at 04:03, Kever Yang <kever.yang@rock-chips.com> wrote:
> driver/usb/dwc3/gadget.c need a "sys_proto.h" header file, add a
> empty one to make compile success.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  arch/arm/include/asm/arch-rockchip/sys_proto.h | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>  create mode 100644 arch/arm/include/asm/arch-rockchip/sys_proto.h

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 2/4] board: evb-rk3399: add api to support dwc3 gadget

[Kever Yang]

This patch add board_usb_init() and interrupt callback
for dwc3 gadget.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 board/rockchip/evb_rk3399/evb-rk3399.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index d394276..cd61f59 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -7,6 +7,8 @@
 #include <dm.h>
 #include <dm/pinctrl.h>
 #include <asm/arch/periph.h>
+#include <usb.h>
+#include <dwc3-uboot.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -54,3 +56,23 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[0].start = 0x200000;
 	gd->bd->bi_dram[0].size = 0x80000000;
 }
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = 0xfe800000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif
-- 
1.9.1

[U-Boot] [PATCH 2/4] board: evb-rk3399: add api to support dwc3 gadget

[Kever Yang]

+ Simon,

On 08/16/2016 06:03 PM, Kever Yang wrote:
> This patch add board_usb_init() and interrupt callback
> for dwc3 gadget.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>   board/rockchip/evb_rk3399/evb-rk3399.c | 22 ++++++++++++++++++++++
>   1 file changed, 22 insertions(+)
>
> diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
> index d394276..cd61f59 100644
> --- a/board/rockchip/evb_rk3399/evb-rk3399.c
> +++ b/board/rockchip/evb_rk3399/evb-rk3399.c
> @@ -7,6 +7,8 @@
>   #include <dm.h>
>   #include <dm/pinctrl.h>
>   #include <asm/arch/periph.h>
> +#include <usb.h>
> +#include <dwc3-uboot.h>
>   
>   DECLARE_GLOBAL_DATA_PTR;
>   
> @@ -54,3 +56,23 @@ void dram_init_banksize(void)
>   	gd->bd->bi_dram[0].start = 0x200000;
>   	gd->bd->bi_dram[0].size = 0x80000000;
>   }
> +
> +#ifdef CONFIG_USB_DWC3
> +static struct dwc3_device dwc3_device_data = {
> +	.maximum_speed = USB_SPEED_HIGH,
> +	.base = 0xfe800000,
> +	.dr_mode = USB_DR_MODE_PERIPHERAL,
> +	.index = 0,
> +};
> +
> +int usb_gadget_handle_interrupts(void)
> +{
> +	dwc3_uboot_handle_interrupt(0);
> +	return 0;
> +}
> +
> +int board_usb_init(int index, enum usb_init_type init)
> +{
> +	return dwc3_uboot_init(&dwc3_device_data);
> +}
> +#endif

[U-Boot] [PATCH 2/4] board: evb-rk3399: add api to support dwc3 gadget

[Simon Glass]

Hi,

On 16 August 2016 at 04:03, Kever Yang <kever.yang@rock-chips.com> wrote:
> This patch add board_usb_init() and interrupt callback
> for dwc3 gadget.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  board/rockchip/evb_rk3399/evb-rk3399.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

>
> diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
> index d394276..cd61f59 100644
> --- a/board/rockchip/evb_rk3399/evb-rk3399.c
> +++ b/board/rockchip/evb_rk3399/evb-rk3399.c
> @@ -7,6 +7,8 @@
>  #include <dm.h>
>  #include <dm/pinctrl.h>
>  #include <asm/arch/periph.h>
> +#include <usb.h>
> +#include <dwc3-uboot.h>
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> @@ -54,3 +56,23 @@ void dram_init_banksize(void)
>         gd->bd->bi_dram[0].start = 0x200000;
>         gd->bd->bi_dram[0].size = 0x80000000;
>  }
> +
> +#ifdef CONFIG_USB_DWC3
> +static struct dwc3_device dwc3_device_data = {
> +       .maximum_speed = USB_SPEED_HIGH,
> +       .base = 0xfe800000,
> +       .dr_mode = USB_DR_MODE_PERIPHERAL,
> +       .index = 0,

I think you are already talking about how this might move to device
tree / driver model. Is that right?

> +};
> +
> +int usb_gadget_handle_interrupts(void)
> +{
> +       dwc3_uboot_handle_interrupt(0);
> +       return 0;
> +}
> +
> +int board_usb_init(int index, enum usb_init_type init)
> +{
> +       return dwc3_uboot_init(&dwc3_device_data);
> +}
> +#endif
> --
> 1.9.1
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

Regards,
Simon

[U-Boot] [PATCH 3/4] usb: dwc3: add support for 16 bit UTMI+ interface

[Kever Yang]

The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
add one MACRO CONFIG_USB_DWC3_USB2PHY_16BIT to support 16 bit
UTMI+ interface on some SoCs like Rockchip rk3399.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 drivers/usb/dwc3/core.c | 10 ++++++++++
 drivers/usb/dwc3/core.h | 11 +++++++++++
 2 files changed, 21 insertions(+)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 85cc96a..7141d11 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -75,6 +75,11 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
 	/* Clear USB2 PHY reset */
 	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 	reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
+#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
+	reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
+	reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
+	reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
+#endif
 	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 
 	mdelay(100);
@@ -388,6 +393,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->dis_u2_susphy_quirk)
 		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 
+#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
+	reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
+	reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
+	reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
+#endif
 	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 
 	mdelay(100);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 72d2fcd..b4f3963 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -74,6 +74,7 @@
 #define DWC3_GCTL		0xc110
 #define DWC3_GEVTEN		0xc114
 #define DWC3_GSTS		0xc118
+#define DWC3_GUCTL1		0xc11c
 #define DWC3_GSNPSID		0xc120
 #define DWC3_GGPIO		0xc124
 #define DWC3_GUID		0xc128
@@ -162,7 +163,17 @@
 
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
+#define DWC3_GUSB2PHYCFG_ENBLSLPM   (1 << 8)
 #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
+#define DWC3_GUSB2PHYCFG_PHYIF_8BIT	(0 << 3)
+#define DWC3_GUSB2PHYCFG_PHYIF_16BIT	(1 << 3)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT	(10)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK	(0xf << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
 
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
-- 
1.9.1

[U-Boot] [PATCH 3/4] usb: dwc3: add support for 16 bit UTMI+ interface

[Marek Vasut]

On 08/16/2016 12:03 PM, Kever Yang wrote:
> The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
> add one MACRO CONFIG_USB_DWC3_USB2PHY_16BIT to support 16 bit
> UTMI+ interface on some SoCs like Rockchip rk3399.
> 
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

This should be configured from either DT or Kconfig option.

> ---
> 
>  drivers/usb/dwc3/core.c | 10 ++++++++++
>  drivers/usb/dwc3/core.h | 11 +++++++++++
>  2 files changed, 21 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 85cc96a..7141d11 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -75,6 +75,11 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
>  	/* Clear USB2 PHY reset */
>  	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
>  	reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
> +#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
> +	reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
> +	reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
> +	reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
> +#endif
>  	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>  
>  	mdelay(100);
> @@ -388,6 +393,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
>  	if (dwc->dis_u2_susphy_quirk)
>  		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
>  
> +#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
> +	reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
> +	reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
> +	reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
> +#endif
>  	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>  
>  	mdelay(100);
> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> index 72d2fcd..b4f3963 100644
> --- a/drivers/usb/dwc3/core.h
> +++ b/drivers/usb/dwc3/core.h
> @@ -74,6 +74,7 @@
>  #define DWC3_GCTL		0xc110
>  #define DWC3_GEVTEN		0xc114
>  #define DWC3_GSTS		0xc118
> +#define DWC3_GUCTL1		0xc11c
>  #define DWC3_GSNPSID		0xc120
>  #define DWC3_GGPIO		0xc124
>  #define DWC3_GUID		0xc128
> @@ -162,7 +163,17 @@
>  
>  /* Global USB2 PHY Configuration Register */
>  #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
> +#define DWC3_GUSB2PHYCFG_ENBLSLPM   (1 << 8)
>  #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
> +#define DWC3_GUSB2PHYCFG_PHYIF_8BIT	(0 << 3)
> +#define DWC3_GUSB2PHYCFG_PHYIF_16BIT	(1 << 3)
> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT	(10)
> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK	(0xf << \
> +		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
> +		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
> +		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>  
>  /* Global USB3 PIPE Control Register */
>  #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
> 


-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH 3/4] usb: dwc3: add support for 16 bit UTMI+ interface

[Kever Yang]

Hi Marek,

On 08/16/2016 09:18 PM, Marek Vasut wrote:
> On 08/16/2016 12:03 PM, Kever Yang wrote:
>> The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
>> add one MACRO CONFIG_USB_DWC3_USB2PHY_16BIT to support 16 bit
>> UTMI+ interface on some SoCs like Rockchip rk3399.
>>
>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> This should be configured from either DT or Kconfig option.

This setting in kernel is from DT, but we do not use DT for gadget mode 
in U-Boot.
How about we add a quirk for it like u2phy_utmi_width_quirk in both 
dwc3_device
and dwc3 struct for device mode?

For Host mode, we can get from DT and also need a quirk to store it.

Thanks,
- Kever
>
>> ---
>>
>>   drivers/usb/dwc3/core.c | 10 ++++++++++
>>   drivers/usb/dwc3/core.h | 11 +++++++++++
>>   2 files changed, 21 insertions(+)
>>
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 85cc96a..7141d11 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -75,6 +75,11 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
>>   	/* Clear USB2 PHY reset */
>>   	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
>>   	reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
>> +#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
>> +	reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
>> +	reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
>> +	reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
>> +#endif
>>   	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>>   
>>   	mdelay(100);
>> @@ -388,6 +393,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
>>   	if (dwc->dis_u2_susphy_quirk)
>>   		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
>>   
>> +#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
>> +	reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
>> +	reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
>> +	reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
>> +#endif
>>   	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>>   
>>   	mdelay(100);
>> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
>> index 72d2fcd..b4f3963 100644
>> --- a/drivers/usb/dwc3/core.h
>> +++ b/drivers/usb/dwc3/core.h
>> @@ -74,6 +74,7 @@
>>   #define DWC3_GCTL		0xc110
>>   #define DWC3_GEVTEN		0xc114
>>   #define DWC3_GSTS		0xc118
>> +#define DWC3_GUCTL1		0xc11c
>>   #define DWC3_GSNPSID		0xc120
>>   #define DWC3_GGPIO		0xc124
>>   #define DWC3_GUID		0xc128
>> @@ -162,7 +163,17 @@
>>   
>>   /* Global USB2 PHY Configuration Register */
>>   #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
>> +#define DWC3_GUSB2PHYCFG_ENBLSLPM   (1 << 8)
>>   #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
>> +#define DWC3_GUSB2PHYCFG_PHYIF_8BIT	(0 << 3)
>> +#define DWC3_GUSB2PHYCFG_PHYIF_16BIT	(1 << 3)
>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT	(10)
>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK	(0xf << \
>> +		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
>> +		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
>> +		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>>   
>>   /* Global USB3 PIPE Control Register */
>>   #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
>>
>

[U-Boot] [PATCH 3/4] usb: dwc3: add support for 16 bit UTMI+ interface

[Marek Vasut]

On 08/17/2016 03:31 AM, Kever Yang wrote:
> Hi Marek,

Hi,

> On 08/16/2016 09:18 PM, Marek Vasut wrote:
>> On 08/16/2016 12:03 PM, Kever Yang wrote:
>>> The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
>>> add one MACRO CONFIG_USB_DWC3_USB2PHY_16BIT to support 16 bit
>>> UTMI+ interface on some SoCs like Rockchip rk3399.
>>>
>>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>> This should be configured from either DT or Kconfig option.
> 
> This setting in kernel is from DT, but we do not use DT for gadget mode
> in U-Boot.
> How about we add a quirk for it like u2phy_utmi_width_quirk in both
> dwc3_device
> and dwc3 struct for device mode?
> 
> For Host mode, we can get from DT and also need a quirk to store it.

Surely, if you can get this info from DT for host mode, you can also get
it from DT for gadget mode, yes ?

> Thanks,
> - Kever
>>
>>> ---
>>>
>>>   drivers/usb/dwc3/core.c | 10 ++++++++++
>>>   drivers/usb/dwc3/core.h | 11 +++++++++++
>>>   2 files changed, 21 insertions(+)
>>>
>>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>>> index 85cc96a..7141d11 100644
>>> --- a/drivers/usb/dwc3/core.c
>>> +++ b/drivers/usb/dwc3/core.c
>>> @@ -75,6 +75,11 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
>>>       /* Clear USB2 PHY reset */
>>>       reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
>>>       reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
>>> +#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
>>> +    reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
>>> +    reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
>>> +    reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
>>> +#endif
>>>       dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>>>         mdelay(100);
>>> @@ -388,6 +393,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
>>>       if (dwc->dis_u2_susphy_quirk)
>>>           reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
>>>   +#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
>>> +    reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
>>> +    reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
>>> +    reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
>>> +#endif
>>>       dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>>>         mdelay(100);
>>> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
>>> index 72d2fcd..b4f3963 100644
>>> --- a/drivers/usb/dwc3/core.h
>>> +++ b/drivers/usb/dwc3/core.h
>>> @@ -74,6 +74,7 @@
>>>   #define DWC3_GCTL        0xc110
>>>   #define DWC3_GEVTEN        0xc114
>>>   #define DWC3_GSTS        0xc118
>>> +#define DWC3_GUCTL1        0xc11c
>>>   #define DWC3_GSNPSID        0xc120
>>>   #define DWC3_GGPIO        0xc124
>>>   #define DWC3_GUID        0xc128
>>> @@ -162,7 +163,17 @@
>>>     /* Global USB2 PHY Configuration Register */
>>>   #define DWC3_GUSB2PHYCFG_PHYSOFTRST    (1 << 31)
>>> +#define DWC3_GUSB2PHYCFG_ENBLSLPM   (1 << 8)
>>>   #define DWC3_GUSB2PHYCFG_SUSPHY        (1 << 6)
>>> +#define DWC3_GUSB2PHYCFG_PHYIF_8BIT    (0 << 3)
>>> +#define DWC3_GUSB2PHYCFG_PHYIF_16BIT    (1 << 3)
>>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT    (10)
>>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK    (0xf << \
>>> +        DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
>>> +        DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
>>> +        DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>>>     /* Global USB3 PIPE Control Register */
>>>   #define DWC3_GUSB3PIPECTL_PHYSOFTRST    (1 << 31)
>>>
>>
> 
> 


-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH 3/4] usb: dwc3: add support for 16 bit UTMI+ interface

[Kever Yang]

Hi Marek,

On 08/17/2016 09:39 AM, Marek Vasut wrote:
> On 08/17/2016 03:31 AM, Kever Yang wrote:
>> Hi Marek,
> Hi,
>
>> On 08/16/2016 09:18 PM, Marek Vasut wrote:
>>> On 08/16/2016 12:03 PM, Kever Yang wrote:
>>>> The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
>>>> add one MACRO CONFIG_USB_DWC3_USB2PHY_16BIT to support 16 bit
>>>> UTMI+ interface on some SoCs like Rockchip rk3399.
>>>>
>>>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>>> This should be configured from either DT or Kconfig option.
>> This setting in kernel is from DT, but we do not use DT for gadget mode
>> in U-Boot.
>> How about we add a quirk for it like u2phy_utmi_width_quirk in both
>> dwc3_device
>> and dwc3 struct for device mode?
>>
>> For Host mode, we can get from DT and also need a quirk to store it.
> Surely, if you can get this info from DT for host mode, you can also get
> it from DT for gadget mode, yes ?

No, for gadget mode, the controller is init by board_usb_init() called 
from cmd like fastboot,
there is no uclass driver for a udc driver and no one parse the DT 
currently.

You can see my patch "[PATCH 2/4] board: evb-rk3399: add api to support 
dwc3 gadget"
for how it initialized.

Thanks,
- Kever

>
>> Thanks,
>> - Kever
>>>> ---
>>>>
>>>>    drivers/usb/dwc3/core.c | 10 ++++++++++
>>>>    drivers/usb/dwc3/core.h | 11 +++++++++++
>>>>    2 files changed, 21 insertions(+)
>>>>
>>>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>>>> index 85cc96a..7141d11 100644
>>>> --- a/drivers/usb/dwc3/core.c
>>>> +++ b/drivers/usb/dwc3/core.c
>>>> @@ -75,6 +75,11 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
>>>>        /* Clear USB2 PHY reset */
>>>>        reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
>>>>        reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
>>>> +#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
>>>> +    reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
>>>> +    reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
>>>> +    reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
>>>> +#endif
>>>>        dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>>>>          mdelay(100);
>>>> @@ -388,6 +393,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
>>>>        if (dwc->dis_u2_susphy_quirk)
>>>>            reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
>>>>    +#ifdef CONFIG_USB_DWC3_USB2PHY_16BIT
>>>> +    reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
>>>> +    reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
>>>> +    reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
>>>> +#endif
>>>>        dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>>>>          mdelay(100);
>>>> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
>>>> index 72d2fcd..b4f3963 100644
>>>> --- a/drivers/usb/dwc3/core.h
>>>> +++ b/drivers/usb/dwc3/core.h
>>>> @@ -74,6 +74,7 @@
>>>>    #define DWC3_GCTL        0xc110
>>>>    #define DWC3_GEVTEN        0xc114
>>>>    #define DWC3_GSTS        0xc118
>>>> +#define DWC3_GUCTL1        0xc11c
>>>>    #define DWC3_GSNPSID        0xc120
>>>>    #define DWC3_GGPIO        0xc124
>>>>    #define DWC3_GUID        0xc128
>>>> @@ -162,7 +163,17 @@
>>>>      /* Global USB2 PHY Configuration Register */
>>>>    #define DWC3_GUSB2PHYCFG_PHYSOFTRST    (1 << 31)
>>>> +#define DWC3_GUSB2PHYCFG_ENBLSLPM   (1 << 8)
>>>>    #define DWC3_GUSB2PHYCFG_SUSPHY        (1 << 6)
>>>> +#define DWC3_GUSB2PHYCFG_PHYIF_8BIT    (0 << 3)
>>>> +#define DWC3_GUSB2PHYCFG_PHYIF_16BIT    (1 << 3)
>>>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT    (10)
>>>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK    (0xf << \
>>>> +        DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>>>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
>>>> +        DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>>>> +#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
>>>> +        DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
>>>>      /* Global USB3 PIPE Control Register */
>>>>    #define DWC3_GUSB3PIPECTL_PHYSOFTRST    (1 << 31)
>>>>
>>
>

[U-Boot] [PATCH 3/4] usb: dwc3: add support for 16 bit UTMI+ interface

[Marek Vasut]

On 08/17/2016 04:06 AM, Kever Yang wrote:
> Hi Marek,
> 
> On 08/17/2016 09:39 AM, Marek Vasut wrote:
>> On 08/17/2016 03:31 AM, Kever Yang wrote:
>>> Hi Marek,
>> Hi,
>>
>>> On 08/16/2016 09:18 PM, Marek Vasut wrote:
>>>> On 08/16/2016 12:03 PM, Kever Yang wrote:
>>>>> The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
>>>>> add one MACRO CONFIG_USB_DWC3_USB2PHY_16BIT to support 16 bit
>>>>> UTMI+ interface on some SoCs like Rockchip rk3399.
>>>>>
>>>>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>>>> This should be configured from either DT or Kconfig option.
>>> This setting in kernel is from DT, but we do not use DT for gadget mode
>>> in U-Boot.
>>> How about we add a quirk for it like u2phy_utmi_width_quirk in both
>>> dwc3_device
>>> and dwc3 struct for device mode?
>>>
>>> For Host mode, we can get from DT and also need a quirk to store it.
>> Surely, if you can get this info from DT for host mode, you can also get
>> it from DT for gadget mode, yes ?
> 
> No, for gadget mode, the controller is init by board_usb_init() called
> from cmd like fastboot,
> there is no uclass driver for a udc driver and no one parse the DT
> currently.

Which doesn't imply you cannot parse the DT though, correct ?
I would _much_ rather see you parsing DT over adding new ad-hoc compile
time config option.

> You can see my patch "[PATCH 2/4] board: evb-rk3399: add api to support
> dwc3 gadget"
> for how it initialized.
> 
> Thanks,
> - Kever
[...]

-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH 3/4] usb: dwc3: add support for 16 bit UTMI+ interface

[Kever Yang]

Hi Marek,

On 08/17/2016 04:07 PM, Marek Vasut wrote:
> On 08/17/2016 04:06 AM, Kever Yang wrote:
>> Hi Marek,
>>
>> On 08/17/2016 09:39 AM, Marek Vasut wrote:
>>> On 08/17/2016 03:31 AM, Kever Yang wrote:
>>>> Hi Marek,
>>> Hi,
>>>
>>>> On 08/16/2016 09:18 PM, Marek Vasut wrote:
>>>>> On 08/16/2016 12:03 PM, Kever Yang wrote:
>>>>>> The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
>>>>>> add one MACRO CONFIG_USB_DWC3_USB2PHY_16BIT to support 16 bit
>>>>>> UTMI+ interface on some SoCs like Rockchip rk3399.
>>>>>>
>>>>>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>>>>> This should be configured from either DT or Kconfig option.
>>>> This setting in kernel is from DT, but we do not use DT for gadget mode
>>>> in U-Boot.
>>>> How about we add a quirk for it like u2phy_utmi_width_quirk in both
>>>> dwc3_device
>>>> and dwc3 struct for device mode?
>>>>
>>>> For Host mode, we can get from DT and also need a quirk to store it.
>>> Surely, if you can get this info from DT for host mode, you can also get
>>> it from DT for gadget mode, yes ?
>> No, for gadget mode, the controller is init by board_usb_init() called
>> from cmd like fastboot,
>> there is no uclass driver for a udc driver and no one parse the DT
>> currently.
> Which doesn't imply you cannot parse the DT though, correct ?
> I would _much_ rather see you parsing DT over adding new ad-hoc compile
> time config option.

Sorry, I don't understand what do you mean by "adding new ad-hoc compile
time config option".

Do you mean (a) add fdt_get_property() to parse DT only for this setting?
Or (b) implement a new driver for gadget mode with driver-model support 
which
bind the device during DT instead of board_usb_init()?

The case (a) would be easy while case (b) suppose to be a big update.
The source of driver for dwc3 gadget is in drivers/usb/dwc3 and the 
source of driver for
dwc3 host is in drivers/usb/host, we will have to merge this two driver 
into one in case (b)
bacause they are using the some controller which means the same dts node.

I would like to see these two driver merge into one like what kernel do, 
but I think it need
someone who very familiar with both dwc3 host and gadget to port the 
driver from kernel.

Thanks,
- Kever
>
>> You can see my patch "[PATCH 2/4] board: evb-rk3399: add api to support
>> dwc3 gadget"
>> for how it initialized.
>>
>> Thanks,
>> - Kever
> [...]
>

[U-Boot] [PATCH 3/4] usb: dwc3: add support for 16 bit UTMI+ interface

[Marek Vasut]

On 08/18/2016 11:04 AM, Kever Yang wrote:
> Hi Marek,

Hi,

> On 08/17/2016 04:07 PM, Marek Vasut wrote:
>> On 08/17/2016 04:06 AM, Kever Yang wrote:
>>> Hi Marek,
>>>
>>> On 08/17/2016 09:39 AM, Marek Vasut wrote:
>>>> On 08/17/2016 03:31 AM, Kever Yang wrote:
>>>>> Hi Marek,
>>>> Hi,
>>>>
>>>>> On 08/16/2016 09:18 PM, Marek Vasut wrote:
>>>>>> On 08/16/2016 12:03 PM, Kever Yang wrote:
>>>>>>> The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
>>>>>>> add one MACRO CONFIG_USB_DWC3_USB2PHY_16BIT to support 16 bit
>>>>>>> UTMI+ interface on some SoCs like Rockchip rk3399.
>>>>>>>
>>>>>>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>>>>>> This should be configured from either DT or Kconfig option.
>>>>> This setting in kernel is from DT, but we do not use DT for gadget
>>>>> mode
>>>>> in U-Boot.
>>>>> How about we add a quirk for it like u2phy_utmi_width_quirk in both
>>>>> dwc3_device
>>>>> and dwc3 struct for device mode?
>>>>>
>>>>> For Host mode, we can get from DT and also need a quirk to store it.
>>>> Surely, if you can get this info from DT for host mode, you can also
>>>> get
>>>> it from DT for gadget mode, yes ?
>>> No, for gadget mode, the controller is init by board_usb_init() called
>>> from cmd like fastboot,
>>> there is no uclass driver for a udc driver and no one parse the DT
>>> currently.
>> Which doesn't imply you cannot parse the DT though, correct ?
>> I would _much_ rather see you parsing DT over adding new ad-hoc compile
>> time config option.
> 
> Sorry, I don't understand what do you mean by "adding new ad-hoc compile
> time config option".

I mean adding CONFIG_USB_DWC3_USB2PHY_16BIT instead of parsing DT .

> Do you mean (a) add fdt_get_property() to parse DT only for this setting?
> Or (b) implement a new driver for gadget mode with driver-model support
> which
> bind the device during DT instead of board_usb_init()?

I think the former would be easier, yes ?

> The case (a) would be easy while case (b) suppose to be a big update.
> The source of driver for dwc3 gadget is in drivers/usb/dwc3 and the
> source of driver for
> dwc3 host is in drivers/usb/host, we will have to merge this two driver
> into one in case (b)
> bacause they are using the some controller which means the same dts node.

I believe drivers/usb/dwc3 is pulled from Linux, so this is the only
codebase which we should ever use to add host mode to.

> I would like to see these two driver merge into one like what kernel do,
> but I think it need
> someone who very familiar with both dwc3 host and gadget to port the
> driver from kernel.

Implementing (a) is fine, while (b) would be excellent.

> Thanks,
> - Kever
>>
>>> You can see my patch "[PATCH 2/4] board: evb-rk3399: add api to support
>>> dwc3 gadget"
>>> for how it initialized.
>>>
>>> Thanks,
>>> - Kever
>> [...]
>>
> 
> 


-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH 4/4] config: rk3399: add support for dwc3 gadget

[Kever Yang]

To support fastboot, we need to enable the controller first.
rk3399 is using dwc3 as usb device controller, this patch enable
the configs for dwc3 gadget.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 include/configs/rk3399_common.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 6875308..bc85e2f 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -27,6 +27,27 @@
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
+/*  usb device */
+#define CONFIG_USB_DWC3
+#define CONFIG_USB_DWC3_GADGET
+#define CONFIG_USB_DWC3_USB2PHY_16BIT
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW	0
+
+/*  fastboot  */
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_USB_FUNCTION_FASTBOOT
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV	1	/* eMMC */
+#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
+#define CONFIG_FASTBOOT_BUF_SIZE	0x08000000
+
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_G_DNL_MANUFACTURER	"Rockchip"
+#define CONFIG_G_DNL_VENDOR_NUM		0x2207
+#define CONFIG_G_DNL_PRODUCT_NUM	0x330a
+
 /* MMC/SD IP block */
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
-- 
1.9.1

[U-Boot] [PATCH 4/4] config: rk3399: add support for dwc3 gadget

[Simon Glass]

On 16 August 2016 at 04:03, Kever Yang <kever.yang@rock-chips.com> wrote:
> To support fastboot, we need to enable the controller first.
> rk3399 is using dwc3 as usb device controller, this patch enable
> the configs for dwc3 gadget.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
> ---
>
>  include/configs/rk3399_common.h | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>