From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Schocher Date: Wed, 17 Aug 2016 09:53:58 +0200 Subject: [U-Boot] [GIT] Pull request: u-boot-dfu In-Reply-To: <6C6B28D4DC342643927BEAFCE8707BF6762DB763@DBDE04.ent.ti.com> References: <20160816154125.7124307a@amdc2363> <6e07adb3-d014-817e-122f-6b8c51b00293@denx.de> <20160816180300.4b75001b@amdc2363> <6C6B28D4DC342643927BEAFCE8707BF6762DB763@DBDE04.ent.ti.com> Message-ID: <57B41816.9090103@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello B, Ravi, Am 17.08.2016 um 09:40 schrieb B, Ravi: > Hi Heiko > >>>> >>>> is that for master or next ? > >>> This patch _was_ supposed to go to "master" > >>>> Was this build tested ? > >>> Unfortunately, not so thoroughly as I thought. > >>> Moving dfu code to SPL causes following error on some boards: > >>> arm: + smartweb >>> +In file included from ../include/dfu.h:18:0, >>> + from ../common/dfu.c:16: >>> +../include/linux/usb/composite.h:331:9: error: requested alignment is >>> +not an integer constant >>> + struct usb_device_descriptor __aligned(CONFIG_SYS_CACHELINE_SIZE) desc; >>> + ^ >>> +make[3]: *** [spl/common/dfu.o] Error 1 >>> +make[2]: *** [spl/common] Error 2 >> +make[1]: *** [spl/u-boot-spl] Error 2 >>> +make: *** [sub-make] Error 2 > > The CONFIG_SYS_CACHELINE_SIZE is not defined for smartweb platform which is causing build error. > By defining this error goes away. What would be value for cache line size for smartweb platform? (32/64/..?) Hups? Which patch introduced this? I wonder if other at91 based boards does not show the same error? The RM for the at91sam9260 says: 8 words cache line size So 32 would be the correct value. bye, Heiko > >>> Ravi, to reproduce you need to fetch u-boot-dfu/test > >>> and run buildman: > > >>> This is only a small subset of affected boards, so please test also "arm" (which might take long time). > >>> ./tools/buildman/buildman.py --branch=HEAD siemens --detail --verbose >>> --show_errors --force-build --count=5 --output-dir=./BUILD/ > > >>> Thanks Marek, for pointing out. > >> I have test build for all ti-platforms, not checked for rest. My bad ..! >> I could reproduce this error, for some platform CONFIG_SYS_CACHELINE_SIZE is not defined. (eg. configs/smartweb_defconfig). >> I will check with "arm" as well, let you know. > > Regards > Ravi > -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany