From mboxrd@z Thu Jan  1 00:00:00 1970
From: Kever Yang <kever.yang@rock-chips.com>
Date: Sat, 08 Oct 2016 10:55:24 +0800
Subject: [U-Boot] [PATCH v2 3/3] rockchip: rk3288: Move
 rockchip_get_cru() out of the driver
In-Reply-To: <1475373892-20780-3-git-send-email-sjg@chromium.org>
References: <1475373892-20780-1-git-send-email-sjg@chromium.org>
 <1475373892-20780-3-git-send-email-sjg@chromium.org>
Message-ID: <57F8601C.3030906@rock-chips.com>
List-Id: <u-boot.lists.denx.de>
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To: u-boot@lists.denx.de

Hi Simon,

On 10/02/2016 10:04 AM, Simon Glass wrote:
> This function is called from outside the driver. It should be placed into
> common SoC code. Move it.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2:
> - Rebase to mainline and fix resulting build error
> - Add a similar change for rk3036 and rk3399
>
>   arch/arm/include/asm/arch-rockchip/cru_rk3288.h |  7 +++++++
>   arch/arm/mach-rockchip/rk3288/clk_rk3288.c      | 16 ++++++++++++++++
>   drivers/clk/rockchip/clk_rk3288.c               | 21 ---------------------
>   3 files changed, 23 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
> index 8a8ca9c..d575f4a 100644
> --- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
> +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
> @@ -25,6 +25,13 @@
>   #define PERI_HCLK_HZ	148500000
>   #define PERI_PCLK_HZ	74250000
>   
> +/* Private data for the clock driver - used by rockchip_get_cru() */
> +struct rk3288_clk_priv {
> +	struct rk3288_grf *grf;
> +	struct rk3288_cru *cru;
> +	ulong rate;
> +};
> +
>   struct rk3288_cru {
>   	struct rk3288_pll {
>   		u32 con0;
> diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
> index 2099e34..a45b923 100644
> --- a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
> +++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
> @@ -9,9 +9,25 @@
>   #include <dm.h>
>   #include <syscon.h>
>   #include <asm/arch/clock.h>
> +#include <asm/arch/cru_rk3288.h>
>   
>   int rockchip_get_clk(struct udevice **devp)
>   {
>   	return uclass_get_device_by_driver(UCLASS_CLK,
>   			DM_GET_DRIVER(rockchip_rk3288_cru), devp);
>   }
> +
> +void *rockchip_get_cru(void)
> +{
> +	struct rk3288_clk_priv *priv;
> +	struct udevice *dev;
> +	int ret;
> +
> +	ret = rockchip_get_clk(&dev);
> +	if (ret)
> +		return ERR_PTR(ret);
> +
> +	priv = dev_get_priv(dev);
> +
> +	return priv->cru;
> +}
> diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
> index bd71a96..ed97e87 100644
> --- a/drivers/clk/rockchip/clk_rk3288.c
> +++ b/drivers/clk/rockchip/clk_rk3288.c
> @@ -30,12 +30,6 @@ struct rk3288_clk_plat {
>   #endif
>   };
>   
> -struct rk3288_clk_priv {
> -	struct rk3288_grf *grf;
> -	struct rk3288_cru *cru;
> -	ulong rate;
> -};
> -
>   struct pll_div {
>   	u32 nr;
>   	u32 nf;
> @@ -140,21 +134,6 @@ static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);
>   static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
>   static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
>   
> -void *rockchip_get_cru(void)
> -{
> -	struct rk3288_clk_priv *priv;
> -	struct udevice *dev;
> -	int ret;
> -
> -	ret = rockchip_get_clk(&dev);
> -	if (ret)
> -		return ERR_PTR(ret);
> -
> -	priv = dev_get_priv(dev);
> -
> -	return priv->cru;
> -}
> -
>   static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
>   			 const struct pll_div *div)
>   {

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever