From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexander Graf Date: Thu, 3 Nov 2016 09:52:24 +0100 Subject: [U-Boot] [RFC PATCH 01/10] sun6i: Restrict some register initialization to Allwinner A31 SoC In-Reply-To: <1478137001-847-2-git-send-email-andre.przywara@arm.com> References: <1478137001-847-1-git-send-email-andre.przywara@arm.com> <1478137001-847-2-git-send-email-andre.przywara@arm.com> Message-ID: <581AFAC8.7080706@suse.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 11/03/2016 02:36 AM, Andre Przywara wrote: > These days many Allwinner SoCs use clock_sun6i.c, although out of them > only the (original sun6i) A31 has a second MBUS clock register. > Also setting up the PRCM PLL_CTLR1 register to provide the proper voltage > seems to be an A31-only feature as well. > So restrict the initialization to this SoC only to avoid writing bogus > values to (undefined) registers in other chips. > > Signed-off-by: Andre Przywara Reviewed-by: Alexander Graf (However I haven't counter-checked with specs) Alex