[U-Boot] [PATCH] serial, ns16550: bugfix: ns16550 fifo not enabled

[Heiko Schocher <hs@denx.de>]

Hello Ladislav,

Am 10.01.2017 um 12:50 schrieb Ladislav Michl:
> Hi Heiko,
>
> On Tue, Jan 10, 2017 at 08:08:51AM +0100, Heiko Schocher wrote:
>> commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor"
>> breaks u-boot commandline working with long commands
>> sending to the board.
>>
>> Since the above patch, you have to setup the fcr register.
>>
>> For board/archs which enable OF_PLATDATA, the new field
>> fcr in struct ns16550_platdata is not filled with a
>> default value ...
>>
>> This leads in not setting up the uarts fifo, which ends
>> in problems, when you send long commands to u-boots
>> commandline.
>>
>> Detected this issue with automated tbot tests on am335x
>> based shc board.
>>
>> The error does not popup, if you type commands. You need
>> to copy&paste a long command to u-boots commandshell
>> (or send a long command with tbot)
>>
>> Possible boards/plattforms with problems:
>> ./arch/arm/cpu/arm926ejs/lpc32xx/devices.c
>> ./arch/arm/mach-tegra/board.c
>> ./board/isee/igep00x0/igep00x0.c
>> ./board/overo/overo.c
>> ./board/quipos/cairo/cairo.c
>> ./board/logicpd/omap3som/omap3logic.c
>> ./board/logicpd/zoom1/zoom1.c
>> ./board/timll/devkit8000/devkit8000.c
>> ./board/lg/sniper/sniper.c
>> ./board/ti/beagle/beagle.c
>> ./drivers/serial/serial_rockchip.c
>
> Quick test shows igep00x0 also suffers from this issue.

Thanks for testing!

> Are you going to collect fixes and apply them as one patch or
> shall I sent a separate patch?

I don;t know ... if my approach fixing this issue is ok,
I can collect it ... Tom decides ;-)

bye,
Heiko
> Anyway, here's fix for igep00x0:
>
> Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
>
> diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
> index ae7959b1eb..8bea199a44 100644
> --- a/board/isee/igep00x0/igep00x0.c
> +++ b/board/isee/igep00x0/igep00x0.c
> @@ -32,7 +32,8 @@ DECLARE_GLOBAL_DATA_PTR;
>   static const struct ns16550_platdata igep_serial = {
>   	.base = OMAP34XX_UART3,
>   	.reg_shift = 2,
> -	.clock = V_NS16550_CLK
> +	.clock = V_NS16550_CLK,
> +	.fcr = UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR,
>   };
>
>   U_BOOT_DEVICE(igep_uart) = {
>
>> This patch fixes only:
>> ./arch/arm/mach-omap2/am33xx/board.c
>>
>> Signed-off-by: Heiko Schocher <hs@denx.de>
>> ---
>>
>>   arch/arm/mach-omap2/am33xx/board.c | 23 +++++++++++++++++------
>>   1 file changed, 17 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
>> index 581c0ab..a0ce62c 100644
>> --- a/arch/arm/mach-omap2/am33xx/board.c
>> +++ b/arch/arm/mach-omap2/am33xx/board.c
>> @@ -39,15 +39,26 @@
>>   DECLARE_GLOBAL_DATA_PTR;
>>
>>   #if !CONFIG_IS_ENABLED(OF_CONTROL)
>> +/* Clear & enable FIFOs */
>> +#define UART_FCRVAL (UART_FCR_FIFO_EN |	\
>> +		     UART_FCR_RXSR |	\
>> +		     UART_FCR_TXSR)
>> +
>>   static const struct ns16550_platdata am33xx_serial[] = {
>> -	{ .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
>> +	{ .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2,
>> +	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCRVAL },
>>   # ifdef CONFIG_SYS_NS16550_COM2
>> -	{ .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
>> +	{ .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2,
>> +	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCRVAL },
>>   #  ifdef CONFIG_SYS_NS16550_COM3
>> -	{ .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
>> -	{ .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
>> -	{ .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
>> -	{ .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
>> +	{ .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2,
>> +	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCRVAL },
>> +	{ .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2,
>> +	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCRVAL },
>> +	{ .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2,
>> +	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCRVAL },
>> +	{ .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2,
>> +	  .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCRVAL },
>>   #  endif
>>   # endif
>>   };
>> --
>> 2.7.4
>

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