[U-Boot] SPL variant of sunxi nand module

[Nikolai Zhubr <n-a-zhubr@yandex.ru>]

23.12.2018 21:58, I wrote:
[...]
> Regarding the sunxi_nand_spl.c module, I can not find any mention if it
> implies NAND_ECC_HW, NAND_ECC_HW_SYNDROME, or rather some other mode, or
> if these modes are irrelevant in this case?

So far I'm observing that sunxi_nand_spl module refuses to load erased 
nand pages (500000 in the example below), which is correct, but it 
"successfully" loads filled nand pages as totally zeroed out, which is 
supposedly incorrect. This is in contrast with sunxi_nand module, that 
loads filled pages correctly, at least in my simple tests.

So while detection in sunxi_nand_spl seems fine, reading seems not.

I think digging deeper without some additional advice is a bit beyond my 
capabilities, although most probably some very tiny bits are missing...


Thank you,

Regards,
Nikolai

U-Boot SPL 2019.01-rc2 (Dec 23 2018 - 23:23:57 +0300)
CPU: 912000000Hz, AXI/AHB/APB: 3/2/2
DRAM: 1024 MiB
 >>SPL: board_init_r()
Trying to boot from NAND
spl: nand - using hw ecc
[zh]nand_spl_load_image(500000, 40)=-22
[zh]Read dump of page 768 (nand offs 600000, page_size 8192):
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
[zh]Read dump of page 768 (nand offs 600000, page_size 8192):
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
=====================================================
U-Boot 2019.01-rc2 (Dec 23 2018 - 22:30:35 +0300) Allwinner Technology

CPU:   Allwinner A20 (SUN7I)
Model: Olimex A20-Olinuxino Micro
I2C:   ready
DRAM:  1 GiB
NAND:  nand_base: device found, Manufacturer ID: 0xad, Chip ID: 0xd7
nand_base: Hynix H27UBG8T2BTR-BC 32G 3.3V 8-bit
nand_base: Hynix H27UBG8T2BTR-BC 32G 3.3V 8-bit
nand_base: 4096 MiB, MLC, erase size: 2048 KiB, page size: 8192, OOB 
size: 640
Using ECC step 1024, strength 40, mode 2
4096 MiB
In:    serial
Out:   serial
Err:   serial
SCSI:  SATA link 0 timeout.
AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
flags: ncq stag pm led clo only pmp pio slum part ccc apst

Net:   Can't get reset: -524
eth0: ethernet at 1c50000
Hit any key to stop autoboot:  0
=> nand read  0x45000000 0x400000 0x1000

NAND read: device 0 offset 0x400000, size 0x1000
Scanning device for bad blocks
Bad eraseblock 0 at 0x0000001fe000
Bad eraseblock 1 at 0x0000003fe000
  4096 bytes read: OK
=> md.b 0x45000000 100
45000000: b8 00 00 ea 14 f0 9f e5 14 f0 9f e5 14 f0 9f e5 
................
=====================================================


>
> Can not guess browsing through the code, it looks too different from
> sunxi_nand.c to compare.
>
>
> Thank you,
>
> Regards,
> Nikolai
>
>
>> On the other hand, normal U-boot variant reads correct data from nand,
>> but I'm not yet sure if it uses correct parameters and specifically, if
>> they match those of SPL version. Need to add yet more debugging output.
>>
>>
>> Thank you,
>>
>> Regards,
>> Nikolai
>>
>>> Michael
>>>
>>>>
>>>> Now the detection routine in sunxi_nand_spl apparently comes up with a
>>>> value of ecc_strength=4 instead... Why is that?
>>>
>>> n - 1 using an index, if the code that I have is aligned so
>>>
>>> Michael
>>>
>>>>
>>>>
>>>> Thank you,
>>>>
>>>> Regards,
>>>> Nikolai
>>>>
>>>>
>>>>>
>>>>>
>>>>> Thank you,
>>>>>
>>>>> Regards,
>>>>> Nikolai
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>>
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>