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From: Dalon L Westergreen <dalon.westergreen@linux.intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v9 1/7] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10
Date: Tue, 26 Feb 2019 07:58:28 -0800	[thread overview]
Message-ID: <5abdba8ea0aadb08a0ba272d1cc244e6ca1d50e2.camel@linux.intel.com> (raw)
In-Reply-To: <e3a7e6af-deab-68b3-65f9-ff9b4f887864@monstr.eu>

On Tue, 2019-02-26 at 16:42 +0100, Michal Simek wrote:
> On 26. 02. 19 15:28, Chee, Tien Fong wrote:
> > On Tue, 2019-02-26 at 15:06 +0100, Michal Simek wrote:
> > > On 19. 02. 19 4:47, tien.fong.chee at intel.com wrote:
> > > > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > 
> > > > This patch adds description on properties about file name used for
> > > > both
> > > > peripheral bitstream and core bitstream.
> > > > 
> > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > 
> > > > ---
> > > > 
> > > > changes for v8
> > > > - Removed explanation about support for altr,bitstream-core
> > > > 
> > > > changes for v7
> > > > - Provided example of setting FPGA FIT image for both early IO
> > > > release
> > > >   and full release FPGA configuration.
> > > > ---
> > > >  .../fpga/altera-socfpga-a10-fpga-mgr.txt           | 26
> > > > +++++++++++++++++++++-
> > > >  1 file changed, 25 insertions(+), 1 deletion(-)
> > > > 
> > > > diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-
> > > > mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-
> > > > mgr.txt
> > > > index 2fd8e7a..da210bf 100644
> > > > --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
> > > > +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
> > > > @@ -7,8 +7,31 @@ Required properties:
> > > >                 - The second index is for writing FPGA
> > > > configuration data.
> > > >  - resets     : Phandle and reset specifier for the device's reset.
> > > >  - clocks     : Clocks used by the device.
> > > > +- altr,bitstream : Fit image file name for both FPGA peripheral
> > > > bitstream,
> > > > +		   FPGA core bitstream and full bitstream.
> > > >  
> > > By adding new required property you are automatically saying that you
> > > want to break all current users.
> > This is company's product specific property, that's why with prefix
> > "altr". DT allows that ,right?
> 
> no issue with altr prefix. Issue is that you add a required property and
> breaking all current users.
> It should be optional.

This parameter is only for Arria10, which at this point is not fully supported
in mainline uboot.  So this doesnt affect any existing designs, no?

--dalon

> 
> M
> 
> 
> 

  reply	other threads:[~2019-02-26 15:58 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-19  3:47 [U-Boot] [PATCH v9 0/7] Add support for loading FPGA bitstream tien.fong.chee at intel.com
2019-02-19  3:47 ` [U-Boot] [PATCH v9 1/7] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 tien.fong.chee at intel.com
2019-02-26 14:06   ` Michal Simek
2019-02-26 14:28     ` Chee, Tien Fong
2019-02-26 15:42       ` Michal Simek
2019-02-26 15:58         ` Dalon L Westergreen [this message]
2019-02-27  6:37           ` Chee, Tien Fong
2019-02-27  9:13             ` Michal Simek
2019-02-28  4:11               ` Chee, Tien Fong
2019-02-19  3:47 ` [U-Boot] [PATCH v9 2/7] ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK tien.fong.chee at intel.com
2019-02-26 14:07   ` Michal Simek
2019-02-26 14:30     ` Chee, Tien Fong
2019-02-26 15:43       ` Michal Simek
2019-02-27  6:10         ` Chee, Tien Fong
2019-02-27  9:12           ` Michal Simek
2019-02-26 14:07   ` Michal Simek
2019-02-26 14:31     ` Chee, Tien Fong
2019-02-19  3:47 ` [U-Boot] [PATCH v9 3/7] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading tien.fong.chee at intel.com
2019-02-26 14:20   ` Michal Simek
2019-02-26 14:34     ` Chee, Tien Fong
2019-02-26 14:53     ` Chee, Tien Fong
2019-02-26 15:46       ` Michal Simek
2019-02-27  6:14         ` Chee, Tien Fong
2019-02-27  6:35         ` Chee, Tien Fong
2019-02-19  3:47 ` [U-Boot] [PATCH v9 4/7] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK tien.fong.chee at intel.com
2019-02-19  3:47 ` [U-Boot] [PATCH v9 5/7] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs tien.fong.chee at intel.com
2019-02-19  3:47 ` [U-Boot] [PATCH v9 6/7] ARM: socfpga: Synchronize the configuration for A10 SoCDK tien.fong.chee at intel.com
2019-02-19  3:47 ` [U-Boot] [PATCH v9 7/7] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL tien.fong.chee at intel.com
2019-02-26 12:34 ` [U-Boot] [PATCH v9 0/7] Add support for loading FPGA bitstream Chee, Tien Fong

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