[U-Boot] [PATCH 79/93] arm: Remove ls1021aiot_sdcard board

Simon Glass
2018-11-19T15:53:59Z

This board has not been converted to CONFIG_DM_BLK by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

arch/arm/Kconfig | 1 -
board/freescale/ls1021aiot/Kconfig | 17 --
board/freescale/ls1021aiot/MAINTAINERS | 7 -
board/freescale/ls1021aiot/Makefile | 7 -
board/freescale/ls1021aiot/README | 58 ----
board/freescale/ls1021aiot/dcu.c | 46 ----
board/freescale/ls1021aiot/ls1021aiot.c | 249 -----------------
board/freescale/ls1021aiot/ls102xa_pbi.cfg | 14 -
board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg | 27 --
board/freescale/ls1021aiot/psci.S | 27 --
configs/ls1021aiot_qspi_defconfig | 39 ---
configs/ls1021aiot_sdcard_defconfig | 44 ---
include/configs/ls1021aiot.h | 251 ------------------
13 files changed, 787 deletions(-)
delete mode 100644 board/freescale/ls1021aiot/Kconfig
delete mode 100644 board/freescale/ls1021aiot/MAINTAINERS
delete mode 100644 board/freescale/ls1021aiot/Makefile
delete mode 100644 board/freescale/ls1021aiot/README
delete mode 100644 board/freescale/ls1021aiot/dcu.c
delete mode 100644 board/freescale/ls1021aiot/ls1021aiot.c
delete mode 100644 board/freescale/ls1021aiot/ls102xa_pbi.cfg
delete mode 100644 board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg
delete mode 100644 board/freescale/ls1021aiot/psci.S
delete mode 100644 configs/ls1021aiot_qspi_defconfig
delete mode 100644 configs/ls1021aiot_sdcard_defconfig
delete mode 100644 include/configs/ls1021aiot.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 97faf09e916..92b65b5bc40 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1508,7 +1508,6 @@ source "board/freescale/ls2080ardb/Kconfig"
source "board/freescale/ls1088a/Kconfig"
source "board/freescale/ls1021aqds/Kconfig"
source "board/freescale/ls1043aqds/Kconfig"
-source "board/freescale/ls1021aiot/Kconfig"
source "board/freescale/ls1046aqds/Kconfig"
source "board/freescale/ls1012aqds/Kconfig"
source "board/freescale/ls1012ardb/Kconfig"
diff --git a/board/freescale/ls1021aiot/Kconfig b/board/freescale/ls1021aiot/Kconfig
deleted file mode 100644
index c6b16063a4a..00000000000
--- a/board/freescale/ls1021aiot/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-if TARGET_LS1021AIOT
-
-config SYS_BOARD
- default "ls1021aiot"
-
-config SYS_VENDOR
- default "freescale"
-
-config SYS_SOC
- default "ls102xa"
-
-config SYS_CONFIG_NAME
- default "ls1021aiot"
-
-source "board/freescale/common/Kconfig"
-
-endif
diff --git a/board/freescale/ls1021aiot/MAINTAINERS b/board/freescale/ls1021aiot/MAINTAINERS
deleted file mode 100644
index 2dab7988eeb..00000000000
--- a/board/freescale/ls1021aiot/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-LS1021AIOT BOARD
-M: Feng Li <feng.li_2@nxp.com>
-S: Maintained
-F: board/freescale/ls1021aiot/
-F: include/configs/ls1021aiot.h
-F: configs/ls1021aiot_sdcard_defconfig
-F: configs/ls1021aiot_qspi_defconfig
diff --git a/board/freescale/ls1021aiot/Makefile b/board/freescale/ls1021aiot/Makefile
deleted file mode 100644
index bec151fd2ac..00000000000
--- a/board/freescale/ls1021aiot/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright 2016 Freescale Semiconductor, Inc.
-
-obj-y += ls1021aiot.o
-obj-$(CONFIG_VIDEO_FSL_DCU_FB) += dcu.o
-obj-$(CONFIG_ARMV7_PSCI) += psci.o
diff --git a/board/freescale/ls1021aiot/README b/board/freescale/ls1021aiot/README
deleted file mode 100644
index 08b0268b9bd..00000000000
--- a/board/freescale/ls1021aiot/README
+++ /dev/null
@@ -1,58 +0,0 @@
-Overview
---------
-The LS1021A-IOT is a Freescale reference board that hosts
-the LS1021A SoC.
-
-LS1021AIOT board Overview
--------------------------
- - DDR Controller
- - Supports 1GB un-buffered DDR3L SDRAM discrete
- devices(32-bit bus) with 4 bit ECC
- - DDR power supplies 1.35V to all devices with
- automatic tracking of VTT
- - Soldered DDR chip
- - Supprot one fixed speed
- - Ethernet
- - Two on-board SGMII 10/100/1G ethernet ports
- - One Gbit Etherent RGMII interface to 4-ports switch
- with 4x 10/100/1000 RJ145 ports
- - CPLD
- - 8-bit registers in CPLD for system configuration
- - connected to IFC_AD[0:7]
- - Power Supplies
- - 12V at 5A DC
- - SDHC
- - SDHC port connects directly to a full 8-bit SD/MMC slot
- - Support for SDIO devices
- - USB
- - Two on-board USB 3.0
- - One on-board USB k22
- - PCIe
- - Two MiniPCIe Solts
- - SATA
- - Support SATA Connector
- - AUDIO
- - AUDIO in and out
- - I/O Expansion
- - Arduino Shield Connector
- - Port0 - CAN/GPIO/Flextimer
- - Port1 - GPIO/CPLD Expansion
- - Port2 - SPI/I2C/UART
-
-Memory map
------------
-The addresses in brackets are physical addresses.
-
-Start Address End Address Description Size
-0x00_0100_0000 0x00_0FFF_FFFF CCSRBAR 240MB
-0x00_4000_0000 0x00_43FF_FFFF QSPI(Chip select 0) 64MB
-0x00_4400_0000 0x00_47FF_FFFF QSPI(Chip select 1) 64MB
-0x00_6000_0000 0x00_6000_FFFF CPLD 64K
-0x00_8000_0000 0x00_BFFF_FFFF DDR 1GB
-
-Boot description
------------------
-LS1021A-IOT support two ways of boot:
-Qspi boot and SD boot
-The board doesn't support boot from another
-source without changing any switch/jumper.
diff --git a/board/freescale/ls1021aiot/dcu.c b/board/freescale/ls1021aiot/dcu.c
deleted file mode 100644
index 9aeee0eac9a..00000000000
--- a/board/freescale/ls1021aiot/dcu.c
+++ /dev/null
@@ -1,46 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2016 Freescale Semiconductor, Inc.
- *
- * FSL DCU Framebuffer driver
- */
-
-#include <common.h>
-#include <fsl_dcu_fb.h>
-#include "div64.h"
-#include "../common/dcu_sii9022a.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-unsigned int dcu_set_pixel_clock(unsigned int pixclock)
-{
- unsigned long long div;
-
- div = (unsigned long long)(gd->bus_clk / 1000);
- div *= (unsigned long long)pixclock;
- do_div(div, 1000000000);
-
- return div;
-}
-
-int platform_dcu_init(unsigned int xres, unsigned int yres,
- const char *port,
- struct fb_videomode *dcu_fb_videomode)
-{
- const char *name;
- unsigned int pixel_format;
-
- if (strncmp(port, "twr_lcd", 4) == 0) {
- name = "TWR_LCD_RGB card";
- } else {
- name = "HDMI";
- dcu_set_dvi_encoder(dcu_fb_videomode);
- }
-
- printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
-
- pixel_format = 32;
- fsl_dcu_init(xres, yres, pixel_format);
-
- return 0;
-}
diff --git a/board/freescale/ls1021aiot/ls1021aiot.c b/board/freescale/ls1021aiot/ls1021aiot.c
deleted file mode 100644
index fb05b55b5c5..00000000000
--- a/board/freescale/ls1021aiot/ls1021aiot.c
+++ /dev/null
@@ -1,249 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2016 Freescale Semiconductor, Inc.
- */
-
-#include <common.h>
-#include <asm/arch/immap_ls102xa.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/fsl_serdes.h>
-#include <asm/arch/ls102xa_stream_id.h>
-
-#include <asm/arch/ls102xa_devdis.h>
-#include <asm/arch/ls102xa_soc.h>
-#include <fsl_csu.h>
-#include <fsl_esdhc.h>
-#include <fsl_immap.h>
-#include <netdev.h>
-#include <fsl_mdio.h>
-#include <tsec.h>
-#include <spl.h>
-
-#include <fsl_validate.h>
-#include "../common/sleep.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define DDR_SIZE 0x40000000
-
-
-int checkboard(void)
-{
- puts("Board: LS1021AIOT\n");
-
-#ifndef CONFIG_QSPI_BOOT
- struct ccsr_gur *dcfg = (struct ccsr_gur *)CONFIG_SYS_FSL_GUTS_ADDR;
- u32 cpldrev;
-
- cpldrev = in_be32(&dcfg->gpporcr1);
-
- printf("CPLD: V%d.%d\n", ((cpldrev >> 28) & 0xf), ((cpldrev >> 24) &
- 0xf));
-#endif
- return 0;
-}
-
-void ddrmc_init(void)
-{
- struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR;
- u32 temp_sdram_cfg, tmp;
-
- out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG);
-
- out_be32(&ddr->cs0_bnds, DDR_CS0_BNDS);
- out_be32(&ddr->cs0_config, DDR_CS0_CONFIG);
-
- out_be32(&ddr->timing_cfg_0, DDR_TIMING_CFG_0);
- out_be32(&ddr->timing_cfg_1, DDR_TIMING_CFG_1);
- out_be32(&ddr->timing_cfg_2, DDR_TIMING_CFG_2);
- out_be32(&ddr->timing_cfg_3, DDR_TIMING_CFG_3);
- out_be32(&ddr->timing_cfg_4, DDR_TIMING_CFG_4);
- out_be32(&ddr->timing_cfg_5, DDR_TIMING_CFG_5);
-
- out_be32(&ddr->sdram_cfg_2, DDR_SDRAM_CFG_2);
- out_be32(&ddr->ddr_cdr2, DDR_DDR_CDR2);
-
- out_be32(&ddr->sdram_mode, DDR_SDRAM_MODE);
- out_be32(&ddr->sdram_mode_2, DDR_SDRAM_MODE_2);
-
- out_be32(&ddr->sdram_interval, DDR_SDRAM_INTERVAL);
-
- out_be32(&ddr->ddr_wrlvl_cntl, DDR_DDR_WRLVL_CNTL);
-
- out_be32(&ddr->ddr_wrlvl_cntl_2, DDR_DDR_WRLVL_CNTL_2);
- out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3);
-
- out_be32(&ddr->ddr_cdr1, DDR_DDR_CDR1);
-
- out_be32(&ddr->sdram_clk_cntl, DDR_SDRAM_CLK_CNTL);
- out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL);
-
- out_be32(&ddr->cs0_config_2, DDR_CS0_CONFIG_2);
-
- /* DDR erratum A-009942 */
- tmp = in_be32(&ddr->debug[28]);
- out_be32(&ddr->debug[28], tmp | 0x0070006f);
-
- udelay(500);
-
- temp_sdram_cfg = (DDR_SDRAM_CFG_MEM_EN & ~SDRAM_CFG_BI);
-
- out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | temp_sdram_cfg);
-}
-
-int dram_init(void)
-{
-#if (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
- ddrmc_init();
-#endif
-
- gd->ram_size = DDR_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_FSL_ESDHC
-struct fsl_esdhc_cfg esdhc_cfg[1] = {
- {CONFIG_SYS_FSL_ESDHC_ADDR},
-};
-
-int board_mmc_init(bd_t *bis)
-{
- esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-
- return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
-}
-
-#endif
-
-#ifdef CONFIG_TSEC_ENET
-int board_eth_init(bd_t *bis)
-{
- struct fsl_pq_mdio_info mdio_info;
- struct tsec_info_struct tsec_info[4];
- int num = 0;
-
-#ifdef CONFIG_TSEC1
- SET_STD_TSEC_INFO(tsec_info[num], 1);
- if (is_serdes_configured(SGMII_TSEC1)) {
- puts("eTSEC1 is in sgmii mode.\n");
- tsec_info[num].flags |= TSEC_SGMII;
- }
- num++;
-#endif
-#ifdef CONFIG_TSEC2
- SET_STD_TSEC_INFO(tsec_info[num], 2);
- if (is_serdes_configured(SGMII_TSEC2)) {
- puts("eTSEC2 is in sgmii mode.\n");
- tsec_info[num].flags |= TSEC_SGMII;
- }
- num++;
-#endif
- if (!num) {
- printf("No TSECs initialized\n");
- return 0;
- }
-
- mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
- mdio_info.name = DEFAULT_MII_NAME;
- fsl_pq_mdio_init(bis, &mdio_info);
-
- tsec_eth_init(bis, tsec_info, num);
-
- return pci_eth_init(bis);
-}
-#endif
-
-int board_early_init_f(void)
-{
- struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
-
-#ifdef CONFIG_TSEC_ENET
- /* clear BD & FR bits for BE BD's and frame data */
- clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
- out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125);
-
-#endif
-
- arch_soc_init();
-
- return 0;
-}
-
-#ifdef CONFIG_SPL_BUILD
-void board_init_f(ulong dummy)
-{
- /* Clear the BSS */
- memset(__bss_start, 0, __bss_end - __bss_start);
-
- get_clocks();
-
- preloader_console_init();
-
- dram_init();
-
- /* Allow OCRAM access permission as R/W */
-
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
- enable_layerscape_ns_access();
-#endif
-
- board_init_r(NULL, 0);
-}
-#endif
-
-int board_init(void)
-{
-#ifndef CONFIG_SYS_FSL_NO_SERDES
- fsl_serdes_init();
-#endif
-
- ls102xa_smmu_stream_id_init();
-
- return 0;
-}
-
-#ifdef CONFIG_BOARD_LATE_INIT
-int board_late_init(void)
-{
- return 0;
-}
-#endif
-
-#if defined(CONFIG_MISC_INIT_R)
-int misc_init_r(void)
-{
-#ifdef CONFIG_FSL_DEVICE_DISABLE
- device_disable(devdis_tbl, ARRAY_SIZE(devdis_tbl));
-
-#endif
-
-#ifdef CONFIG_FSL_CAAM
- return sec_init();
-#endif
-}
-#endif
-
-int ft_board_setup(void *blob, bd_t *bd)
-{
- ft_cpu_setup(blob, bd);
-
-#ifdef CONFIG_PCI
- ft_pci_setup(blob, bd);
-#endif
-
- return 0;
-}
-
-void flash_write16(u16 val, void *addr)
-{
- u16 shftval = (((val >> 8) & 0xff) | ((val << 8) & 0xff00));
-
- __raw_writew(shftval, addr);
-}
-
-u16 flash_read16(void *addr)
-{
- u16 val = __raw_readw(addr);
-
- return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
-}
diff --git a/board/freescale/ls1021aiot/ls102xa_pbi.cfg b/board/freescale/ls1021aiot/ls102xa_pbi.cfg
deleted file mode 100644
index b5ac5e27e9d..00000000000
--- a/board/freescale/ls1021aiot/ls102xa_pbi.cfg
+++ /dev/null
@@ -1,14 +0,0 @@
-#PBI commands
-
-09570200 ffffffff
-09570158 00000300
-8940007c 21f47300
-
-#Configure Scratch register
-09ee0200 10000000
-#Configure alternate space
-09570158 00001000
-#Flush PBL data
-096100c0 000FFFFF
-
-09ea085c 00502880
diff --git a/board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg b/board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg
deleted file mode 100644
index a1984c713d5..00000000000
--- a/board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg
+++ /dev/null
@@ -1,27 +0,0 @@
-#PBL preamble and RCW header
-aa55aa55 01ee0100
-# serdes protocol
-
-#Default with 2 x SGMII (no SATA)
-0608000a 00000000 00000000 00000000
-20000000 08407900 60025a00 21046000
-00000000 00000000 00000000 20038000
-20024800 881b1340 00000000 00000000
-
-#SATA set-up
-#0608000a 00000000 00000000 00000000
-#70000000 08007900 60025a00 21046000
-#00000000 00000000 00000000 20038000
-#20024800 881b1340 00000000 00000000
-
-#HDMI set-up
-#0608000a 00000000 00000000 00000000
-#20000000 08407900 60025a00 21046000
-#00000000 00000000 00000000 20038000
-#00000000 881b1340 00000000 00000000
-
-#QE testing
-#0608000a 00000000 00000000 00000000
-#20000000 08407900 60025a00 21046000
-#00000000 00000000 00000000 00038000
-#20094800 881b1340 00000000 00000000
diff --git a/board/freescale/ls1021aiot/psci.S b/board/freescale/ls1021aiot/psci.S
deleted file mode 100644
index d0106ba3905..00000000000
--- a/board/freescale/ls1021aiot/psci.S
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2016 NXP Semiconductor.
- * Author: Feng Li <feng.li_2@nxp.com>
- */
-
-#include <config.h>
-#include <linux/linkage.h>
-
-#include <asm/armv7.h>
-#include <asm/psci.h>
-
- .pushsection ._secure.text, "ax"
-
- .arch_extension sec
-
- .align 5
-
-.globl psci_system_off
-psci_system_off:
-1: wfi
- b 1b
-
-.globl psci_text_end
-psci_text_end:
- nop
- .popsection
diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig
deleted file mode 100644
index 0cafb5f2947..00000000000
--- a/configs/ls1021aiot_qspi_defconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_LS1021AIOT=y
-CONFIG_SYS_TEXT_BASE=0x40010000
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
-CONFIG_MISC_INIT_R=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart"
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_DM=y
-CONFIG_FSL_CAAM=y
-CONFIG_FSL_ESDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHY_GIGE=y
-CONFIG_E1000=y
-CONFIG_MII=y
-CONFIG_TSEC_ENET=y
-CONFIG_PCI=y
-CONFIG_DM_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE=y
-CONFIG_SYS_NS16550=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_FSL_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
deleted file mode 100644
index 0b15353bac5..00000000000
--- a/configs/ls1021aiot_sdcard_defconfig
+++ /dev/null
@@ -1,44 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_LS1021AIOT=y
-CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
-CONFIG_MISC_INIT_R=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart"
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_DM=y
-CONFIG_FSL_CAAM=y
-CONFIG_FSL_ESDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHY_GIGE=y
-CONFIG_E1000=y
-CONFIG_MII=y
-CONFIG_TSEC_ENET=y
-CONFIG_PCI=y
-CONFIG_DM_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE=y
-CONFIG_SYS_NS16550=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_FSL_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_STORAGE=y
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
deleted file mode 100644
index 10dc0c68435..00000000000
--- a/include/configs/ls1021aiot.h
+++ /dev/null
@@ -1,251 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2016 Freescale Semiconductor, Inc.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
-
-#define CONFIG_SYS_FSL_CLK
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024 * 1024)
-
-#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
-
-#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
-
-/*
- * DDR: 800 MHz ( 1600 MT/s data rate )
- */
-
-#define DDR_SDRAM_CFG 0x470c0008
-#define DDR_CS0_BNDS 0x008000bf
-#define DDR_CS0_CONFIG 0x80014302
-#define DDR_TIMING_CFG_0 0x50550004
-#define DDR_TIMING_CFG_1 0xbcb38c56
-#define DDR_TIMING_CFG_2 0x0040d120
-#define DDR_TIMING_CFG_3 0x010e1000
-#define DDR_TIMING_CFG_4 0x00000001
-#define DDR_TIMING_CFG_5 0x03401400
-#define DDR_SDRAM_CFG_2 0x00401010
-#define DDR_SDRAM_MODE 0x00061c60
-#define DDR_SDRAM_MODE_2 0x00180000
-#define DDR_SDRAM_INTERVAL 0x18600618
-#define DDR_DDR_WRLVL_CNTL 0x8655f605
-#define DDR_DDR_WRLVL_CNTL_2 0x05060607
-#define DDR_DDR_WRLVL_CNTL_3 0x05050505
-#define DDR_DDR_CDR1 0x80040000
-#define DDR_DDR_CDR2 0x00000001
-#define DDR_SDRAM_CLK_CNTL 0x02000000
-#define DDR_DDR_ZQ_CNTL 0x89080600
-#define DDR_CS0_CONFIG_2 0
-#define DDR_SDRAM_CFG_MEM_EN 0x80000000
-#define SDRAM_CFG2_D_INIT 0x00000010
-#define DDR_CDR2_VREF_TRAIN_EN 0x00000080
-#define SDRAM_CFG2_FRC_SR 0x80000000
-#define SDRAM_CFG_BI 0x00000001
-
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI \
- board/freescale/ls1021aiot/ls102xa_pbi.cfg
-#endif
-
-#ifdef CONFIG_SD_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW \
- board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_WATCHDOG_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8
-
-#define CONFIG_SPL_TEXT_BASE 0x10000000
-#define CONFIG_SPL_MAX_SIZE 0x1a000
-#define CONFIG_SPL_STACK 0x1001d000
-#define CONFIG_SPL_PAD_TO 0x1c000
-
-#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \
- CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-#define CONFIG_SPL_BSS_START_ADDR 0x80100000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
-#define CONFIG_SYS_MONITOR_LEN 0x80000
-#endif
-
-#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-
-/*
- * Serial Port
- */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-#define CONFIG_SYS_NS16550_CLK get_serial_clock()
-
-/*
- * I2C
- */
-#define CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-
-/* EEPROM */
-#define CONFIG_ID_EEPROM
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM 0
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-
-/*
- * MMC
- */
-#define CONFIG_CMD_MMC
-
-/* SATA */
-#define CONFIG_SCSI_AHCI_PLAT
-#ifndef PCI_DEVICE_ID_FREESCALE_AHCI
-#define PCI_DEVICE_ID_FREESCALE_AHCI 0x0440
-#endif
-#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_FREESCALE, \
- PCI_DEVICE_ID_FREESCALE_AHCI}
-
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
-#define CONFIG_SYS_SCSI_MAX_LUN 1
-#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
- CONFIG_SYS_SCSI_MAX_LUN)
-
-/* SPI */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_SPI_FLASH_SPANSION
-
-/* QSPI */
-#define QSPI0_AMBA_BASE 0x40000000
-#define FSL_QSPI_FLASH_SIZE (1 << 24)
-#define FSL_QSPI_FLASH_NUM 2
-#define CONFIG_SPI_FLASH_BAR
-#define CONFIG_SPI_FLASH_SPANSION
-#endif
-
-/* DM SPI */
-#if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI)
-#define CONFIG_CMD_SF
-#define CONFIG_DM_SPI_FLASH
-#endif
-
-/*
- * eTSEC
- */
-
-#ifdef CONFIG_TSEC_ENET
-#define CONFIG_MII_DEFAULT_TSEC 1
-#define CONFIG_TSEC1 1
-#define CONFIG_TSEC1_NAME "eTSEC1"
-#define CONFIG_TSEC2 1
-#define CONFIG_TSEC2_NAME "eTSEC2"
-
-#define TSEC1_PHY_ADDR 1
-#define TSEC2_PHY_ADDR 3
-
-#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-
-#define TSEC1_PHYIDX 0
-#define TSEC2_PHYIDX 0
-
-#define CONFIG_ETHPRIME "eTSEC2"
-
-#define CONFIG_PHY_ATHEROS
-
-#define CONFIG_HAS_ETH0
-#define CONFIG_HAS_ETH1
-#define CONFIG_HAS_ETH2
-#endif
-
-/* PCIe */
-#define CONFIG_PCIE1 /* PCIE controler 1 */
-#define CONFIG_PCIE2 /* PCIE controler 2 */
-
-#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
-
-#ifdef CONFIG_PCI
-#define CONFIG_PCI_SCAN_SHOW
-#endif
-
-#define CONFIG_CMD_MII
-
-#define CONFIG_CMDLINE_TAG
-
-#define CONFIG_PEN_ADDR_BIG_ENDIAN
-#define CONFIG_LAYERSCAPE_NS_ACCESS
-#define CONFIG_SMP_PEN_ADDR 0x01ee0200
-#define COUNTER_FREQUENCY 12500000
-
-#define CONFIG_HWCONFIG
-#define HWCONFIG_BUFFER_SIZE 256
-
-#define CONFIG_FSL_DEVICE_DISABLE
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
-"initrd_high=0xffffffff\0" \
-"fdt_high=0xffffffff\0"
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_CMD_GREPENV
-#define CONFIG_CMD_MEMINFO
-
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
-#define CONFIG_LS102XA_STREAM_ID
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
-#else
-/* start of monitor */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#endif
-
-#define CONFIG_SYS_QE_FW_ADDR 0x67f40000
-
-/*
- * Environment
- */
-
-#define CONFIG_ENV_OVERWRITE
-
-#if defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET 0x100000
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_ENV_SIZE 0x2000
-#elif defined(CONFIG_QSPI_BOOT)
-#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_OFFSET 0x100000
-#define CONFIG_ENV_SECT_SIZE 0x10000
-#endif
-
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-#include <asm/fsl_secure_boot.h>
-
-#endif
--
2.19.1.1215.g8438c0b245-goog