From mboxrd@z Thu Jan  1 00:00:00 1970
From: Dinh Nguyen <dinguyen@kernel.org>
Date: Tue, 19 Feb 2019 14:09:36 -0600
Subject: [U-Boot] [PATCH] ARM: socfpga: Configure PL310 latencies
In-Reply-To: <20190219004400.841-1-marex@denx.de>
References: <20190219004400.841-1-marex@denx.de>
Message-ID: <5f573a5a-4d53-98cf-2bfa-086fac361413@kernel.org>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de



On 2/18/19 6:44 PM, Marek Vasut wrote:
> Configure the PL310 tag and data latency registers, which slightly
> improves performance and aligns the behavior with Linux.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Dalon Westergreen <dwesterg@gmail.com>
> Cc: Dinh Nguyen <dinguyen@kernel.org>
> ---
>  arch/arm/mach-socfpga/misc.c | 3 +++
>  1 file changed, 3 insertions(+)
> 

Looks good!

Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>