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[86.58.6.171]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d43f3328bsm135495875e9.1.2025.03.23.05.25.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Mar 2025 05:25:15 -0700 (PDT) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: Tom Rini , Andre Przywara Cc: Simon Glass , Mikhail Kalashnikov , u-boot@lists.denx.de, linux-sunxi@lists.linux.dev Subject: Re: [PATCH 27/34] sunxi: armv8: FEL: save and restore GICv3 registers Date: Sun, 23 Mar 2025 13:25:14 +0100 Message-ID: <6031809.MhkbZ0Pkbq@jernej-laptop> In-Reply-To: <20250323113544.7933-28-andre.przywara@arm.com> References: <20250323113544.7933-1-andre.przywara@arm.com> <20250323113544.7933-28-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Dne nedelja, 23. marec 2025 ob 12:35:37 Srednjeevropski standardni =C4=8Das= je Andre Przywara napisal(a): > To be able to return to the BootROM FEL USB debug code, we must restore > the core's state as accurately as possible after the SPL has been run. > Since the BootROM runs in AArch32, but the SPL uses AArch64, this requires > a core reset, which clears the core's state. > So far we were saving and restoring the required registers like SCTLR > and VBAR, but could ignore the interrupt controller's state (GICC), since > that lives in MMIO registers, unaffected by a core reset. > Newer Allwinner SoCs now feature a GICv3 interrupt controller, which keeps > some GIC state in architected system registers, and those are cleared > when we switch back to AArch32. >=20 > To enable FEL operation on the Allwinner A523 SoC, > Add AArch32 assembly code to save and restore the ICC_PMR and ICC_IGRPEN1 > system registers. The other GICv3 sysregs are either not relevant for the > BROM operation, or haven't been changed from their reset defaults by the > BROM anyway. >=20 > This enables FEL operation on the Allwinner A523 family of SoCs. >=20 > Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec Best regards, Jernej