From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Stuebner Date: Fri, 06 Dec 2019 17:07:37 +0100 Subject: [PATCH] rockchip: px30: Change RK809 PMIC interrupt polarity In-Reply-To: <20191206154629.3823-1-miquel.raynal@bootlin.com> References: <20191206154629.3823-1-miquel.raynal@bootlin.com> Message-ID: <6063579.sZB4UShRSq@phil> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Am Freitag, 6. Dezember 2019, 16:46:29 CET schrieb Miquel Raynal: > PMIC interrupt can be active high or active low depending on BIT(1) of > the GPIO_INT_CFG pin. The default is 0x1, which means active > high. Change the polarity in the device tree to reflect the default > state. > > This change does not impact U-Boot directly as there are no interrupts > at this stage but it keeps the device tree synced with Linux. > > Signed-off-by: Miquel Raynal just for reference so this doesn't get applied by accident, in the kernel we changed the register-programmed interrupt polarity to low, so that this is in line with all other rk8xx pmics, so don't need to change the devicetree in the kernel or in uboot. Heiko