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Tue, 27 Oct 2026 15:20:53 +0000 Message-ID: <60feed8a-6c44-47da-80cd-03b5179c11ea@amd.com> Date: Tue, 27 Oct 2026 16:20:44 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 00/26] usb: dwc3: part 2, make the resynced code work To: Marek Vasut , Anders Roxell , Quentin Schulz Cc: u-boot@lists.u-boot-project.org, trini@konsulko.com, ilias.apalodimas@linaro.org, alchark@flipper.net, jerome.forissier@arm.com, dlechner@baylibre.com, anshuld@ti.com, sjg@chromium.org, Thinh.Nguyen@synopsys.com, mkorpershoek@kernel.org, love.kumar@amd.com, Kunihiko Hayashi , Nishanth Menon , Patrice CHOTARD , Patrick DELAUNAY , Casey Connolly , Jonas Karlman , Peng Fan , Mark Kettenis , Janne Grunau , Chin-Liang See , "Chee, Tien Fong" , "dinguyen@kernel.org" References: <20260916123826.517181-1-anders.roxell@linaro.org> <80e9e892-24de-4cba-b84a-35bdcb6a903c@cherry.de> <50db221f-8e06-4519-a44f-5ee36b8f3df3@mailbox.org> Content-Language: en-US From: Michal Simek Autocrypt: addr=michal.simek@amd.com; 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Ultra Flair that are USB3 but they are >>> consistently detected as USB2 in U-Boot for some reason. >> >> Same without my patches? >> >> No rush, I know you are away for a month. > > I would like to move this series forward, so let me get input on the status. > Below are the vendors which use DWC3 core that I could find in tree, can I get a > go/no-go on this series from each of you ? I hope the CC is complete, if not, > please add the missing people. > > allwinner > altera > amlogic > apple > broadcom > exynos > freescale > microchip > qcom > rockchip > socionext > st > ti > xilinx No issue from AMD/Xilinx side. Would be good to get it to 2027.01 version. Here are Tested-by tags from Love. https://lore.kernel.org/r/9fa15c90-b725-4ac2-b4c5-f388d5319fd8@amd.com https://lore.kernel.org/r/140c9bb9-756a-4000-acd8-a1893cb98801@amd.com Thanks, Michal