From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 57903C19F29 for ; Thu, 4 Aug 2022 03:21:19 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4857284314; Thu, 4 Aug 2022 05:21:15 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bPFofY08"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id CF50F843A2; Thu, 4 Aug 2022 05:21:13 +0200 (CEST) Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1C15B84117 for ; Thu, 4 Aug 2022 05:21:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=f.fainelli@gmail.com Received: by mail-pf1-x42d.google.com with SMTP id w185so18218971pfb.4 for ; Wed, 03 Aug 2022 20:21:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc; bh=tYJLg1iURPml0CeAY/UzoWxTnT2S8CuIZ8tkvxAm81w=; b=bPFofY08PFf28vG1fL/brfhffeXTacUOqM2pHKBrlua5jPx3MGvevLq1azW+xkvm1X tmWkHoOYPOi7yZaD/ptzc0mPPuPshpq+hYZO/qhhVifOlnDZ7m3GVvPMBXsQ+rcXuZhn PK75SC0Tcvqheuwjkgjuh6CWkllZDxVnIdB0yOVlpa2ma6RQAPq+QjQVTaZf1g4Gez9N IucgTZYfXm6/Zv2yhGnPBcUDRWEi+TWeVYw9VGL6I+72uNgC9ATGvwC8nkrOpBplXkPE VCwpVU3uL8v7VnDFn5K2tPBGjmWzE+Vyhl9mDfGlNvV1B3eWFTGr2cv7ZQc0YeyjrQy9 CbrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc; bh=tYJLg1iURPml0CeAY/UzoWxTnT2S8CuIZ8tkvxAm81w=; b=u6YdK+OF3HMO+YnyyzZxrF9YymUcad3XqvULYHWF7biSFMycJF8gRqGDqqNAkozhWG yRdnCpsiZPB1klJNhtKp3QEY5/3wG9GhzI0osWkwV40WMxTqNsKE3cF7JHNePLgFmOTB 5Jx3WUIqfWH1DBATdx3Od5HMvduXjtWa6xNLQa6JjmTdttAqfcT6wHxOew0gCizw7LIK RjFKH16VD623pW4NR4SFtS/i00pDmzRDmJglfXAkQgu+Cj0E84WZ548Pp+MdpA5rv1hP tCsnP+JJ05/mrQcr1v+5NhzDalHBYwX+d7/PCI6zYZZjZhCzPGXKzmn7V40Dut/hC6M/ teNA== X-Gm-Message-State: ACgBeo2TYT57Ze9sdm4ptnPgpu9T7PIR9yVhaZR8zXUuzc9XvJDLxyw6 XZVDy+TIDRMvYQNhqQOdUsc= X-Google-Smtp-Source: AA6agR6Fnxq8N0hvqfNioW8fIXugYM36+0MB+qxPVtmdqYa0FerMtOI+WXGCq/G7qnqYeLpkK4gO0g== X-Received: by 2002:a05:6a00:32cb:b0:52e:2756:3558 with SMTP id cl11-20020a056a0032cb00b0052e27563558mr6449209pfb.59.1659583268246; Wed, 03 Aug 2022 20:21:08 -0700 (PDT) Received: from ?IPV6:2600:8802:b00:4a48:4c10:50a3:f8c8:88ac? ([2600:8802:b00:4a48:4c10:50a3:f8c8:88ac]) by smtp.gmail.com with ESMTPSA id e20-20020a170902ed9400b0016f1319d2aasm2756881plj.171.2022.08.03.20.21.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Aug 2022 20:21:07 -0700 (PDT) Message-ID: <66f63eae-920b-db0f-40cc-68ed64560f1c@gmail.com> Date: Wed, 3 Aug 2022 20:21:04 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.1.0 Subject: Re: [PATCH] timer: bcmbca: Add Broadcom BCMBCA timer support Content-Language: en-US To: William Zhang , =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , U-Boot Mailing List Cc: joel.peshkin@broadcom.com, philippe.reynes@softathome.com, dan.beygelman@broadcom.com, kursad.oney@broadcom.com, tomer.yacoby@broadcom.com, anand.gore@broadcom.com, Bin Meng , Claudiu Beznea , =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= , Eugen Hristev , Jim Liu , Michal Simek , Nick Hawkins , Rick Chen , Simon Glass , yschu@nuvoton.com References: <20220801150106.1.I5e77bf65d8eb58cb0e4691334381b4bc1ec857b2@changeid> <6e1a3b3e-63c1-b058-3ee4-6b03a12725a9@gmail.com> From: Florian Fainelli In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On 8/2/2022 5:07 PM, William Zhang wrote: > Hi Rafal, > > On 08/01/2022 10:26 PM, Rafał Miłecki wrote: >> On 2.08.2022 00:03, William Zhang wrote: >>> This driver supports the peripheral block timer found on the Broadcom >>> BCA SoCs. It is 30-bit up-count timer running at 50MHz and can be used >>> as the system clock source such as on BCM63138. >>> Signed-off-by: William Zhang >>> >>> (...) >>> >>> +static const struct udevice_id bcmbca_timer_ids[] = { >>> +    { .compatible = "brcm,bcm-timers" }, >>> +    { } >>> +}; >>> + >>> +U_BOOT_DRIVER(bcmbca_timer) = { >>> +    .name = "bcmbca_timer", >>> +    .id = UCLASS_TIMER, >>> +    .of_match = bcmbca_timer_ids, >>> +    .priv_auto = sizeof(struct bcmbca_timer_priv), >>> +    .probe = bcmbca_timer_probe, >>> +    .ops = &bcmbca_timer_ops, >>> +    .flags = DM_FLAG_PRE_RELOC, >>> +}; >> >> That "brcm,bcm-timers" seems like a really wide bidding. Is that exact >> timer block guaranteed to be present on all Broadcom devices? Does it >> exist e.g. on Northstar SoCs? Or old MIPS SoCs like BCM4706? >> > Agree I will make change to use brcm,bcmbca-timers. Why not change to use a compatible string that uses the first chip in which this timer block was introduced, was that 6345 or later? > >> It seems that even across BCMBCA devices this block may differ and may >> need different bindings. Most SoCs have 4 CTL and 4 CNT registers but >> some have only 3 + 3 (BCM6838 BCM60333 BCM63268). > This timer driver is intended for the clock source for u-boot only so > only need the first channel. Although it could work for the old mips > based dsl chip, BCMBCA chip family support is only for the new ARM based >  chips which is stated in the BCMBA introduction patch. > >> >> Finally could we have that binding actually documented? > I don't see u-boot has binding document.  I believe it generally use > linux binding document.  I have no plan to upstream this driver to > linux. But I can put the binding info in the driver if that is the right > way to do in u-boot. Out of curiosity, why does u-boot require this timer as opposed to using the Cortex-A9 architected timers? Is it necessary to boot strap the A9 timers? -- Florian