From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Sat, 19 Sep 2020 14:44:24 +0200 Subject: [PATCH] net: ravb: Fix NULL pointer access In-Reply-To: References: <20200915141038.3371-1-biju.das.jz@bp.renesas.com> <0ae44ba9-0781-906d-537e-f1e115ccd903@gmail.com> <94436429-6470-c1b7-6b5e-a096f4b37472@gmail.com> Message-ID: <684dc047-8b62-942f-33f1-cd2626d99fb7@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 9/19/20 1:14 PM, Biju Das wrote: [...] >>> By looking at [1], only this driver is using writeext. >>> [1]https://elixir.bootlin.com/u-boot/v2020.10-rc4/A/ident/writeext >> >> git grep indicates a couple more sites where the writeext is called. >> But look into the KSZ9031 datasheet, that particular writeext call seems to be >> setting up RGMII Clock Pad Skew (MMD Address 2, Register 8), and I think >> there is a matching DT binding to set those up too, rxc-skew-ps and txc- >> skew-ps I think. > > Thanks for the pointers. I checked the configs[2] which uses renesas ravb driver > and found that we are defining only rxc-skew-ps in all dts. > > since CONFIG DM_ETH is defined it is already picking the value corresponding to "rxc-skew-ps". > > For txc-skew-ps anyway the value is default one. So we don't care. Are you sure (0xf << 5) | 0x19 is the same as the default value of the clock pad skew register ? [...]