[U-Boot] [PATCH 01/11] arm: at91: Makefile: Compile lowlevel_init only when really necessary

[U-Boot] [PATCH 01/11] arm: at91: Makefile: Compile lowlevel_init only when really necessary

[Stefan Roese]

Make sure that lowlevel_init is not compiled when
CONFIG_SKIP_LOWLEVEL_INIT_ONLY is configured.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 arch/arm/mach-at91/arm926ejs/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-at91/arm926ejs/Makefile b/arch/arm/mach-at91/arm926ejs/Makefile
index 0639d7ea1e..6b0b28957a 100644
--- a/arch/arm/mach-at91/arm926ejs/Makefile
+++ b/arch/arm/mach-at91/arm926ejs/Makefile
@@ -24,8 +24,10 @@ obj-y	+= timer.o
 endif
 
 ifndef CONFIG_SKIP_LOWLEVEL_INIT
+ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 obj-y	+= lowlevel_init.o
 endif
+endif
 
 ifdef CONFIG_$(SPL_)SYS_THUMB_BUILD
 ifndef CONFIG_HAS_THUMB2
-- 
2.21.0

[U-Boot] [PATCH 02/11] arm: at91: spl_at91.c: Call spl_early_init() if OF_CONTROL is enabled

[Stefan Roese]

This patch adds a call to spl_early_init() to board_init_f() which is
needed when CONFIG_SPL_OF_CONTROL is configured. This is necessary for
the early SPL setup including the DTB setup for later usage.

Please note that this call might also be needed for non SPL_OF_CONTROL
board, like the smartweb target. But smartweb fails to build with this
call because its binary grows too big. So I disabled it for these kind
of targets for now.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 arch/arm/mach-at91/spl_at91.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c
index 23ebaa99b1..1065f090e0 100644
--- a/arch/arm/mach-at91/spl_at91.c
+++ b/arch/arm/mach-at91/spl_at91.c
@@ -75,6 +75,16 @@ void __weak spl_board_init(void)
 
 void board_init_f(ulong dummy)
 {
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+	int ret;
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+#endif
+
 	lowlevel_clock_init();
 #if !defined(CONFIG_WDT_AT91)
 	at91_disable_wdt();
-- 
2.21.0

[U-Boot] [PATCH 03/11] serial: atmel_usart: Use fixed clock value in SPL version

[Stefan Roese]

This patch adds an alterative SPL version of atmel_serial_enable_clk().
This enables the usage of this driver without full clock support (in
drivers and DT nodes). This saves some space in the SPL image.

If some boards need a different clock than the one provided with this
patch, then support for this needs to be added later.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 drivers/serial/atmel_usart.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index aa8cdff840..049172baef 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -218,6 +218,17 @@ static const struct dm_serial_ops atmel_serial_ops = {
 	.setbrg = atmel_serial_setbrg,
 };
 
+#ifdef CONFIG_SPL_BUILD
+static int atmel_serial_enable_clk(struct udevice *dev)
+{
+	struct atmel_serial_priv *priv = dev_get_priv(dev);
+
+	/* Use fixed clock value in SPL */
+	priv->usart_clk_rate = 132096000;
+
+	return 0;
+}
+#else
 static int atmel_serial_enable_clk(struct udevice *dev)
 {
 	struct atmel_serial_priv *priv = dev_get_priv(dev);
@@ -245,6 +256,7 @@ static int atmel_serial_enable_clk(struct udevice *dev)
 
 	return 0;
 }
+#endif
 
 static int atmel_serial_probe(struct udevice *dev)
 {
-- 
2.21.0

[U-Boot] [PATCH 04/11] watchdog: Handle SPL build with watchdog disabled

[Stefan Roese]

This patch adds some checks, so that the watchdog can be enabled in main
U-Boot proper but can be disabled in SPL.

This will be used by some AT91SAM based boards, which might enable the
watchdog in the main U-Boot proper and not in SPL. It will be enabled in
SPL by default there, so no need to configure it there. This approach
saves some space in SPL.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 include/watchdog.h | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/include/watchdog.h b/include/watchdog.h
index 14073cfdd2..3a357de903 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -51,9 +51,15 @@ int init_func_watchdog_reset(void);
 		#if defined(__ASSEMBLY__)
 			#define WATCHDOG_RESET bl watchdog_reset
 		#else
-			extern void watchdog_reset(void);
+			/* Don't require the watchdog to be enabled in SPL */
+			#if defined(CONFIG_SPL_BUILD) &&		\
+				!defined(CONFIG_SPL_WATCHDOG_SUPPORT)
+				#define WATCHDOG_RESET() {}
+			#else
+				extern void watchdog_reset(void);
 
-			#define WATCHDOG_RESET watchdog_reset
+				#define WATCHDOG_RESET watchdog_reset
+			#endif
 		#endif
 	#else
 		/*
-- 
2.21.0

[U-Boot] [PATCH 05/11] watchdog: at91sam9_wdt: Fix WDT setup in at91_wdt_start()

[Stefan Roese]

This patch fixes the timer register setup in at91_wdt_start() to
correctly configure the register again. The input timeout value is
now in milli-seconds instead of seconds with the new watchdog API.
Make sure to take this into account and only use a max timeout
value of 16 seconds as appropriate for this SoC.

Also the check against a lower timeout value than 0 is removed. This
check makes no sense, as the timeout value is unsigned.

Signed-off-by: Stefan Roese <sr@denx.de>
Reported-by: Heiko Schocher <hs@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 drivers/watchdog/at91sam9_wdt.c | 26 ++++++++++++++------------
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 13f8772e41..b0a3b4ed58 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -17,6 +17,7 @@
 #include <asm/io.h>
 #include <asm/arch/at91_wdt.h>
 #include <common.h>
+#include <div64.h>
 #include <dm.h>
 #include <errno.h>
 #include <wdt.h>
@@ -31,27 +32,30 @@ DECLARE_GLOBAL_DATA_PTR;
 #define WDT_SEC2TICKS(s)	(((s) << 8) - 1)
 
 /* Hardware timeout in seconds */
-#define WDT_MAX_TIMEOUT 16
-#define WDT_MIN_TIMEOUT 0
-#define WDT_DEFAULT_TIMEOUT 2
+#define WDT_MAX_TIMEOUT		16
+#define WDT_DEFAULT_TIMEOUT	2
 
 struct at91_wdt_priv {
 	void __iomem *regs;
-	u32	regval;
-	u32	timeout;
+	u32 regval;
+	u32 timeout;
 };
 
 /*
  * Set the watchdog time interval in 1/256Hz (write-once)
  * Counter is 12 bit.
  */
-static int at91_wdt_start(struct udevice *dev, u64 timeout_s, ulong flags)
+static int at91_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
 {
 	struct at91_wdt_priv *priv = dev_get_priv(dev);
-	u32 timeout = WDT_SEC2TICKS(timeout_s);
+	u64 timeout;
+	u32 ticks;
 
-	if (timeout_s > WDT_MAX_TIMEOUT || timeout_s < WDT_MIN_TIMEOUT)
-		timeout = priv->timeout;
+	/* Calculate timeout in seconds and the resulting ticks */
+	timeout = timeout_ms;
+	do_div(timeout, 1000);
+	timeout = min_t(u64, timeout, WDT_MAX_TIMEOUT);
+	ticks = WDT_SEC2TICKS(timeout);
 
 	/* Check if disabled */
 	if (readl(priv->regs + AT91_WDT_MR) & AT91_WDT_MR_WDDIS) {
@@ -65,12 +69,10 @@ static int at91_wdt_start(struct udevice *dev, u64 timeout_s, ulong flags)
 	 * Since WDV is a 12-bit counter, the maximum period is
 	 * 4096 / 256 = 16 seconds.
 	 */
-
 	priv->regval = AT91_WDT_MR_WDRSTEN	/* causes watchdog reset */
 		| AT91_WDT_MR_WDDBGHLT		/* disabled in debug mode */
 		| AT91_WDT_MR_WDD(0xfff)	/* restart at any time */
-		| AT91_WDT_MR_WDV(timeout);	/* timer value */
-
+		| AT91_WDT_MR_WDV(ticks);	/* timer value */
 	writel(priv->regval, priv->regs + AT91_WDT_MR);
 
 	return 0;
-- 
2.21.0

[U-Boot] [PATCH 06/11] arm: at91: Enable watchdog support

[Stefan Roese]

This patch enables and starts the watchdog on the AT91 platform if
configured. Currently the WD timeout is configured to 16 seconds,
which is the longest value for this timer.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 arch/arm/mach-at91/clock.c | 41 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 64cbc3d1ed..2d442d0092 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <dm.h>
+#include <wdt.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pmc.h>
@@ -118,3 +120,42 @@ void at91_pllicpr_init(u32 icpr)
 
 	writel(icpr, &pmc->pllicpr);
 }
+
+#if defined(CONFIG_WATCHDOG) && !defined(CONFIG_SPL_BUILD)
+static struct udevice *watchdog_dev;
+
+/* Called by macro WATCHDOG_RESET */
+void watchdog_reset(void)
+{
+	static ulong next_reset;
+	ulong now;
+
+	if (!watchdog_dev)
+		return;
+
+	now = get_timer(0);
+
+	/* Do not reset the watchdog too often */
+	if (now > next_reset) {
+		next_reset = now + 1000;	/* reset every 1000ms */
+		wdt_reset(watchdog_dev);
+	}
+}
+
+int arch_misc_init(void)
+{
+	/* Init watchdog */
+	if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
+		debug("Watchdog: Not found by seq!\n");
+		if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
+			puts("Watchdog: Not found!\n");
+			return 0;
+		}
+	}
+
+	wdt_start(watchdog_dev, 16000, 0);	/* 16 seconds is max */
+	printf("Watchdog: Started\n");
+
+	return 0;
+}
+#endif
-- 
2.21.0

[U-Boot] [PATCH 07/11] arm: at91: arm926ejs/u-boot-spl.lds: Add _image_binary_end to SPL lds

[Stefan Roese]

This patch adds _image_binary_end to the SPL linker script. This will be
used be the upcoming GARDENA AT91SAM based platform, which uses DT in
SPL and configures CONFIGURE_SPL_SEPARATE_BSS.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
index f18b17dc93..3955bea23a 100644
--- a/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
+++ b/arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
@@ -39,6 +39,8 @@ SECTIONS
 		*(.__end)
 	} >.sram
 
+	_image_binary_end = .;
+
 	.bss :
 	{
 		. = ALIGN(4);
-- 
2.21.0

[U-Boot] [PATCH 08/11] Makefile.spl: Move generate AT91SAM NAND image boot.bin to spl directory

[Stefan Roese]

This patch moves the AT91SAM NAND booting SPL image "boot.bin" which
includes the ECC values from the root directory into the spl directory,
where all SPL related images are located.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 scripts/Makefile.spl | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 9d5921606e..37be18da4b 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -179,10 +179,10 @@ MKIMAGEFLAGS_boot.bin = -T atmelimage
 ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y)
 MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params)
 
-boot.bin: $(obj)/../tools/atmel_pmecc_params
+$(obj)/boot.bin: $(obj)/../tools/atmel_pmecc_params
 endif
 
-boot.bin: $(obj)/u-boot-spl.bin FORCE
+$(obj)/boot.bin: $(obj)/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)
 else
 ifdef CONFIG_ARCH_ZYNQ
@@ -225,7 +225,7 @@ endif
 endif
 
 ifeq ($(CONFIG_SYS_SOC),"at91")
-ALL-y	+= boot.bin
+ALL-y	+= $(obj)/boot.bin
 endif
 
 ALL-$(CONFIG_SPL_X86_16BIT_INIT) += $(obj)/u-boot-x86-16bit-spl.bin
-- 
2.21.0

[U-Boot] [PATCH 09/11] Makefile: Add Kconfig option CONFIG_SPL_IMAGE to select the SPL binary

[Stefan Roese]

This patch adds the CONFIG_SPL_IMAGE option to select the SPL image that
shall be used to generate the combined SPL + U-Boot image. The default
value is the current value "spl/u-boot-spl.bin".

This patch also sets CONFIG_SPL_IMAGE to "spl/boot.bin" for AT91 targets
which use SPL NAND support (boot from NAND).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 Kconfig  | 10 ++++++++++
 Makefile |  4 +++-
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/Kconfig b/Kconfig
index 512c7beb89..6ad58926eb 100644
--- a/Kconfig
+++ b/Kconfig
@@ -224,6 +224,15 @@ config BUILD_ROM
 	  which are not shipped in the U-Boot source tree.
 	  Please, see doc/README.x86 for details.
 
+config SPL_IMAGE
+	string "SPL image filename that is generated"
+	default "spl/boot.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
+	default "spl/u-boot-spl.bin"
+	help
+	  The SPL image filename that is generated by the build process.
+	  This image might be used to generated a combined image with
+	  SPL and main U-Boot proper as well.
+
 config BUILD_TARGET
 	string "Build target special images"
 	default "u-boot-with-spl.sfp" if ARCH_SOCFPGA
@@ -231,6 +240,7 @@ config BUILD_TARGET
 	default "u-boot-elf.srec" if RCAR_GEN3
 	default "u-boot.itb" if SPL_LOAD_FIT && ARCH_SUNXI
 	default "u-boot.kwb" if KIRKWOOD
+	default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
 	help
 	  Some SoCs need special image types (e.g. U-Boot binary
 	  with a special header) as build targets. By defining
diff --git a/Makefile b/Makefile
index c52a33b403..7397724a2b 100644
--- a/Makefile
+++ b/Makefile
@@ -1219,9 +1219,11 @@ else
 SPL_PAYLOAD := u-boot.bin
 endif
 
+SPL_IMAGE := $(CONFIG_SPL_IMAGE:"%"=%)
+
 OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \
 				   --pad-to=$(CONFIG_SPL_PAD_TO)
-u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE
+u-boot-with-spl.bin: $(SPL_IMAGE) $(SPL_PAYLOAD) FORCE
 	$(call if_changed,pad_cat)
 
 ifeq ($(CONFIG_ARCH_LPC32XX)$(CONFIG_SPL),yy)
-- 
2.21.0

[U-Boot] [PATCH 10/11] arm: at91: siemens: Add support to generate combined SPL+U-Boot image

[Stefan Roese]

This patch adds the necessary defines to the Siemens AT91SAM based
boards (smartweb, corvus and taurus) to generate the combined binary
image with SPL and main U-Boot image combined (u-boot-with-spl.bin).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 include/configs/corvus.h   | 3 +++
 include/configs/smartweb.h | 4 ++++
 include/configs/taurus.h   | 3 +++
 3 files changed, 10 insertions(+)

diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 5dd5c28e08..749a67d4b0 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -139,4 +139,7 @@
 #define CONFIG_SYS_MCKR			0x1301
 #define CONFIG_SYS_MCKR_CSS		0x1302
 
+#define CONFIG_SPL_PAD_TO		CONFIG_SYS_NAND_U_BOOT_OFFS
+#define CONFIG_SYS_SPL_LEN		CONFIG_SPL_PAD_TO
+
 #endif
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 28af575bf2..f95b29480d 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -221,4 +221,8 @@
 #define CONFIG_SYS_ICACHE_OFF
 #define CONFIG_SYS_DCACHE_OFF
 #endif
+
+#define CONFIG_SPL_PAD_TO		CONFIG_SYS_NAND_U_BOOT_OFFS
+#define CONFIG_SYS_SPL_LEN		CONFIG_SPL_PAD_TO
+
 #endif /* __CONFIG_H */
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index f283ab7fca..8e56e62282 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -177,4 +177,7 @@
 #define CONFIG_SYS_MCKR_CSS		(0x02 | CONFIG_SYS_MCKR)
 #define CONFIG_SYS_AT91_PLLB		0x10193F05
 
+#define CONFIG_SPL_PAD_TO		CONFIG_SYS_NAND_U_BOOT_OFFS
+#define CONFIG_SYS_SPL_LEN		CONFIG_SPL_PAD_TO
+
 #endif
-- 
2.21.0

[U-Boot] [PATCH 11/11] arm: at91: Add gardena-gateway-at91sam support

[Stefan Roese]

The GARDENA smart Gateway boards are equipped with an Atmel / Microchip
AT91SAM9G25 SoC and with 128 MiB of RAM and 256 MiB of NAND storage.
This patch adds support for this board including SPL support. Therefore
the AT91Boostrap is not needed on this platform any more.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
---
 .../arm/dts/gardena-smart-gateway-at91sam.dts | 104 ++++++++++++++
 arch/arm/mach-at91/Kconfig                    |   8 ++
 board/gardena/smart-gateway-at91sam/Kconfig   |  12 ++
 .../gardena/smart-gateway-at91sam/MAINTAINERS |   7 +
 board/gardena/smart-gateway-at91sam/Makefile  |   7 +
 board/gardena/smart-gateway-at91sam/board.c   |  59 ++++++++
 board/gardena/smart-gateway-at91sam/spl.c     | 135 ++++++++++++++++++
 .../gardena-smart-gateway-at91sam_defconfig   |  84 +++++++++++
 .../configs/gardena-smart-gateway-at91sam.h   |  88 ++++++++++++
 9 files changed, 504 insertions(+)
 create mode 100644 arch/arm/dts/gardena-smart-gateway-at91sam.dts
 create mode 100644 board/gardena/smart-gateway-at91sam/Kconfig
 create mode 100644 board/gardena/smart-gateway-at91sam/MAINTAINERS
 create mode 100644 board/gardena/smart-gateway-at91sam/Makefile
 create mode 100644 board/gardena/smart-gateway-at91sam/board.c
 create mode 100644 board/gardena/smart-gateway-at91sam/spl.c
 create mode 100644 configs/gardena-smart-gateway-at91sam_defconfig
 create mode 100644 include/configs/gardena-smart-gateway-at91sam.h

diff --git a/arch/arm/dts/gardena-smart-gateway-at91sam.dts b/arch/arm/dts/gardena-smart-gateway-at91sam.dts
new file mode 100644
index 0000000000..a6de7d02d5
--- /dev/null
+++ b/arch/arm/dts/gardena-smart-gateway-at91sam.dts
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Device Tree file for the GARDENA smart Gateway (AT91SAM)
+ *
+ *  Copyright (C) 2012 Atmel,
+ *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
+ */
+
+/dts-v1/;
+
+#include "at91sam9g25.dtsi"
+#include "at91sam9x5ek.dtsi"
+
+/ {
+	model = "GARDENA smart Gateway (AT91SAM)";
+	compatible = "gardena,smart-gateway-at91sam", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+
+	memory {
+		reg = <0x20000000 0x8000000>;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		power_blue {
+			label = "smartgw:power:blue";
+			gpios = <&pioC 21 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		power_green {
+			label = "smartgw:power:green";
+			gpios = <&pioC 20 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+
+		power_red {
+			label = "smartgw:power:red";
+			gpios = <&pioC 19 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		radio_blue {
+			label = "smartgw:radio:blue";
+			gpios = <&pioC 18 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		radio_green {
+			label = "smartgw:radio:green";
+			gpios = <&pioC 17 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		radio_red {
+			label = "smartgw:radio:red";
+			gpios = <&pioC 16 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		internet_blue {
+			label = "smartgw:internet:blue";
+			gpios = <&pioC 15 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		internet_green {
+			label = "smartgw:internet:green";
+			gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		internet_red {
+			label = "smartgw:internet:red";
+			gpios = <&pioC 13 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+	};
+};
+
+&dbgu {
+	status = "okay";
+};
+
+&macb0 {
+	phy-mode = "rmii";
+	status = "okay";
+};
+
+&mmc0 {
+	status = "disabled";
+};
+
+&mmc1 {
+	status = "disabled";
+};
+
+&nand0 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "disabled";
+};
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index a6329dc022..87b986ae38 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -147,6 +147,13 @@ config TARGET_AT91SAM9X5EK
 	select BOARD_LATE_INIT
 	select SUPPORT_SPL
 
+config TARGET_GARDENA_SMART_GATWAY_AT91SAM
+	bool "GARDENA smart Gateway (AT91SAM)"
+	select AT91SAM9X5
+	select BOARD_EARLY_INIT_F
+	select BOARD_LATE_INIT
+	select SUPPORT_SPL
+
 config TARGET_SAMA5D2_PTC_EK
 	bool "SAMA5D2 PTC EK board"
 	select BOARD_EARLY_INIT_F
@@ -283,6 +290,7 @@ source "board/bluewater/snapper9260/Kconfig"
 source "board/calao/usb_a9263/Kconfig"
 source "board/egnite/ethernut5/Kconfig"
 source "board/esd/meesc/Kconfig"
+source "board/gardena/smart-gateway-at91sam/Kconfig"
 source "board/l+g/vinco/Kconfig"
 source "board/mini-box/picosam9g45/Kconfig"
 source "board/ronetix/pm9261/Kconfig"
diff --git a/board/gardena/smart-gateway-at91sam/Kconfig b/board/gardena/smart-gateway-at91sam/Kconfig
new file mode 100644
index 0000000000..a09a3eaa74
--- /dev/null
+++ b/board/gardena/smart-gateway-at91sam/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_GARDENA_SMART_GATWAY_AT91SAM
+
+config SYS_BOARD
+	default "smart-gateway-at91sam"
+
+config SYS_VENDOR
+	default "gardena"
+
+config SYS_CONFIG_NAME
+	default "gardena-smart-gateway-at91sam"
+
+endif
diff --git a/board/gardena/smart-gateway-at91sam/MAINTAINERS b/board/gardena/smart-gateway-at91sam/MAINTAINERS
new file mode 100644
index 0000000000..a5e4c71b82
--- /dev/null
+++ b/board/gardena/smart-gateway-at91sam/MAINTAINERS
@@ -0,0 +1,7 @@
+GARDENA_SMART_GATEWAY_AT91SAM BOARD
+M:	Stefan Roese <sr@denx.de>
+S:	Maintained
+F:	board/gardena/smart-gateway-at91sam/
+F:	include/configs/gardena-smart-gateway-at91sam.h
+F:	configs/gardena-smart-gateway-at91sam_defconfig
+F:	arch/arm/dts/gardena-smart-gateway-at91sam.dts
diff --git a/board/gardena/smart-gateway-at91sam/Makefile b/board/gardena/smart-gateway-at91sam/Makefile
new file mode 100644
index 0000000000..a2ed79fd06
--- /dev/null
+++ b/board/gardena/smart-gateway-at91sam/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += board.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+endif
diff --git a/board/gardena/smart-gateway-at91sam/board.c b/board/gardena/smart-gateway-at91sam/board.c
new file mode 100644
index 0000000000..6a1389eb05
--- /dev/null
+++ b/board/gardena/smart-gateway-at91sam/board.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2012 Atmel Corporation
+ * Copyright (C) 2019 Stefan Roese <sr@denx.de>
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <led.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/clk.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void at91_prepare_cpu_var(void)
+{
+	env_set("cpu", get_cpu_name());
+}
+
+int board_late_init(void)
+{
+	at91_prepare_cpu_var();
+
+	if (IS_ENABLED(CONFIG_LED))
+		led_default_state();
+
+	return 0;
+}
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+	at91_seriald_hw_init();
+}
+#endif
+
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+	debug_uart_init();
+#endif
+	return 0;
+}
+
+int board_init(void)
+{
+	/* Address of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+
+	return 0;
+}
diff --git a/board/gardena/smart-gateway-at91sam/spl.c b/board/gardena/smart-gateway-at91sam/spl.c
new file mode 100644
index 0000000000..3ab6760df7
--- /dev/null
+++ b/board/gardena/smart-gateway-at91sam/spl.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2012 Atmel Corporation
+ * Copyright (C) 2019 Stefan Roese <sr@denx.de>
+ */
+
+#include <common.h>
+#include <nand.h>
+#include <spl.h>
+#include <asm/arch/at91sam9x5_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/gpio.h>
+
+static void at91sam9x5ek_nand_hw_init(void)
+{
+	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+	unsigned long csa;
+
+	/* Enable CS3 */
+	csa = readl(&matrix->ebicsa);
+	csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
+
+	/* NAND flash on D16 */
+	csa |= AT91_MATRIX_NFD0_ON_D16;
+
+	/* Configure IO drive */
+	csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+
+	writel(csa, &matrix->ebicsa);
+
+	/* Configure SMC CS3 for NAND/SmartMedia */
+	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+	       AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+	       &smc->cs[3].setup);
+	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) |
+	       AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(6),
+	       &smc->cs[3].pulse);
+	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(6),
+	       &smc->cs[3].cycle);
+	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+	       AT91_SMC_MODE_EXNW_DISABLE |
+#ifdef CONFIG_SYS_NAND_DBW_16
+	       AT91_SMC_MODE_DBW_16 |
+#else /* CONFIG_SYS_NAND_DBW_8 */
+	       AT91_SMC_MODE_DBW_8 |
+#endif
+	       AT91_SMC_MODE_TDF_CYCLE(1),
+	       &smc->cs[3].mode);
+
+	at91_periph_clk_enable(ATMEL_ID_PIOCD);
+
+	/* Configure RDY/BSY */
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+	/* Enable NandFlash */
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 0, 1);	/* NAND OE */
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 1, 1);	/* NAND WE */
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 2, 1);	/* NAND ALE */
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 3, 1);	/* NAND CLE */
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 6, 1);
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 7, 1);
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 8, 1);
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 9, 1);
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 10, 1);
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 11, 1);
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 12, 1);
+	at91_pio3_set_a_periph(AT91_PIO_PORTD, 13, 1);
+}
+
+void at91_spl_board_init(void)
+{
+	at91sam9x5ek_nand_hw_init();
+}
+
+static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
+{
+	ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
+
+	ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+		    ATMEL_MPDDRC_CR_NR_ROW_13 |
+		    ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
+		    ATMEL_MPDDRC_CR_NB_8BANKS |
+		    ATMEL_MPDDRC_CR_DECOD_INTERLEAVED);
+
+	ddr2->rtr = 0x411;
+
+	ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET |
+		      8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET);
+
+	ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET |
+		      200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
+		      19 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
+		      18 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
+
+	ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
+		      3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
+		      7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
+}
+
+void mem_init(void)
+{
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct atmel_mpddrc_config ddr2;
+	unsigned long csa;
+
+	ddr2_conf(&ddr2);
+
+	/* Enable DDR2 clock */
+	writel(AT91_PMC_DDR, &pmc->scer);
+
+	/* Chip select 1 is for DDR2/SDRAM */
+	csa = readl(&matrix->ebicsa);
+	csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
+	csa &= ~AT91_MATRIX_EBI_DBPU_OFF;
+	csa |= AT91_MATRIX_EBI_DBPD_OFF;
+	csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+	writel(csa, &matrix->ebicsa);
+
+	/* DDRAM2 Controller initialize */
+	ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2);
+}
diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig
new file mode 100644
index 0000000000..af324184b8
--- /dev/null
+++ b/configs/gardena-smart-gateway-at91sam_defconfig
@@ -0,0 +1,84 @@
+CONFIG_ARM=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x22900000
+CONFIG_TARGET_GARDENA_SMART_GATWAY_AT91SAM=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0xfffff200
+CONFIG_DEBUG_UART_CLOCK=132000000
+CONFIG_SMBIOS_PRODUCT_NAME="at91sam9x5ek"
+CONFIG_DEBUG_UART=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_FIT=y
+CONFIG_NAND_BOOT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_SEPARATE_BSS=y
+# CONFIG_TPL_BANNER_PRINT is not set
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DM=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_NAND=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=nand0"
+CONFIG_MTDPARTS_DEFAULT="nand0:1536k(uboot),1024k(unused),512k(dtb_old),4608k(kernel_old),86528k(ubi),-(rootfs_old)"
+CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-at91sam"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupts interrupt-parent interrupts-extended dmas dma-names"
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_BLK=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+# CONFIG_MMC is not set
+CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+# CONFIG_CONFIG_UBI_SILENCE_MSG is not set
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_ATMEL_USART=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_ATMEL_PIT_TIMER=y
+# CONFIG_SYS_WHITE_ON_BLACK is not set
+CONFIG_WATCHDOG=y
+CONFIG_WDT=y
+CONFIG_WDT_AT91=y
+CONFIG_AT91_HW_WDT_TIMEOUT=y
+# CONFIG_UBIFS_SILENCE_MSG is not set
+CONFIG_USE_TINY_PRINTF=y
diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h
new file mode 100644
index 0000000000..e9a06e6d00
--- /dev/null
+++ b/include/configs/gardena-smart-gateway-at91sam.h
@@ -0,0 +1,88 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2012 Atmel Corporation
+ * Copyright (C) 2019 Stefan Roese <sr@denx.de>
+ *
+ * Configuation settings for the GARDENA smart Gateway (AT91SAM9G25)
+ */
+
+#ifndef __CONFIG_H__
+#define __CONFIG_H__
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK	32768
+#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
+
+/* SDRAM */
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_SIZE		0x08000000	/* 128 megs */
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_MALLOC_LEN		(16 * 1024 * 1024)
+
+/* NAND flash */
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		0x40000000
+#define CONFIG_SYS_NAND_DBW_8		1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE	BIT(21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE	BIT(22)
+#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
+#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
+
+#define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
+
+/* environment organization */
+#define CONFIG_ENV_UBI_PART		"ubi"
+#define CONFIG_ENV_UBI_VOLUME		"env"
+#define CONFIG_ENV_UBI_VOLUME_REDUND	"env_r"
+#define CONFIG_ENV_SIZE			(64 << 10)
+
+/* SPL */
+#define CONFIG_SPL_TEXT_BASE		0x300000
+#define CONFIG_SPL_MAX_SIZE		0x7000
+#define CONFIG_SPL_STACK		0x308000
+
+#define CONFIG_SPL_BSS_START_ADDR	0x20000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
+#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
+
+#define CONFIG_SYS_MONITOR_LEN		(512 << 10)
+
+#define CONFIG_SYS_MASTER_CLOCK		132096000
+#define CONFIG_SYS_AT91_PLLA		0x20c73f03
+#define CONFIG_SYS_MCKR			0x1301
+#define CONFIG_SYS_MCKR_CSS		0x1302
+
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_RAW_ONLY
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0xa0000
+#define	CONFIG_SYS_UBOOT_START		CONFIG_SYS_TEXT_BASE
+#define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
+
+#define CONFIG_SPL_PAD_TO		CONFIG_SYS_NAND_U_BOOT_OFFS
+#define CONFIG_SYS_SPL_LEN		CONFIG_SPL_PAD_TO
+
+#endif
-- 
2.21.0

[U-Boot] [PATCH 03/11] serial: atmel_usart: Use fixed clock value in SPL version

[Eugen.Hristev at microchip.com]

On 19.03.2019 17:56, Stefan Roese wrote:
> External E-Mail
> 
> 
> This patch adds an alterative SPL version of atmel_serial_enable_clk().
> This enables the usage of this driver without full clock support (in
> drivers and DT nodes). This saves some space in the SPL image.
> 
> If some boards need a different clock than the one provided with this
> patch, then support for this needs to be added later.
> 
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Heiko Schocher <hs@denx.de>
> Cc: Andreas Bießmann <andreas@biessmann.org>
> Cc: Eugen Hristev <eugen.hristev@microchip.com>
> ---
>   drivers/serial/atmel_usart.c | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
> index aa8cdff840..049172baef 100644
> --- a/drivers/serial/atmel_usart.c
> +++ b/drivers/serial/atmel_usart.c
> @@ -218,6 +218,17 @@ static const struct dm_serial_ops atmel_serial_ops = {
>   	.setbrg = atmel_serial_setbrg,
>   };
>   
> +#ifdef CONFIG_SPL_BUILD
> +static int atmel_serial_enable_clk(struct udevice *dev)
> +{
> +	struct atmel_serial_priv *priv = dev_get_priv(dev);
> +
> +	/* Use fixed clock value in SPL */
> +	priv->usart_clk_rate = 132096000;

Hi Stefan,

Does this mean that the SPL will work *if and only if* this clock 
matches the board's clock, for all at91 boards? (thus, boards having a 
different clock , the serial will not function correctly anymore ?)

Eugen

> +
> +	return 0;
> +}
> +#else
>   static int atmel_serial_enable_clk(struct udevice *dev)
>   {
>   	struct atmel_serial_priv *priv = dev_get_priv(dev);
> @@ -245,6 +256,7 @@ static int atmel_serial_enable_clk(struct udevice *dev)
>   
>   	return 0;
>   }
> +#endif
>   
>   static int atmel_serial_probe(struct udevice *dev)
>   {
> 

[U-Boot] [PATCH 04/11] watchdog: Handle SPL build with watchdog disabled

[Eugen.Hristev at microchip.com]

On 19.03.2019 17:56, Stefan Roese wrote:
> External E-Mail
> 
> 
> This patch adds some checks, so that the watchdog can be enabled in main
> U-Boot proper but can be disabled in SPL.

Hi Stefan,

Actually your code looks at CONFIG_SPL_WATCHDOG_SUPPORT , so , if this 
is disabled in the config, you say that the watchdog was still enabled? 
(thus broken CONFIG_SPL_WATCHDOG_SUPPORT ?)

Eugen

> 
> This will be used by some AT91SAM based boards, which might enable the
> watchdog in the main U-Boot proper and not in SPL. It will be enabled in
> SPL by default there, so no need to configure it there. This approach
> saves some space in SPL.
> 
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Heiko Schocher <hs@denx.de>
> Cc: Andreas Bießmann <andreas@biessmann.org>
> Cc: Eugen Hristev <eugen.hristev@microchip.com>
> ---
>   include/watchdog.h | 10 ++++++++--
>   1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/include/watchdog.h b/include/watchdog.h
> index 14073cfdd2..3a357de903 100644
> --- a/include/watchdog.h
> +++ b/include/watchdog.h
> @@ -51,9 +51,15 @@ int init_func_watchdog_reset(void);
>   		#if defined(__ASSEMBLY__)
>   			#define WATCHDOG_RESET bl watchdog_reset
>   		#else
> -			extern void watchdog_reset(void);
> +			/* Don't require the watchdog to be enabled in SPL */
> +			#if defined(CONFIG_SPL_BUILD) &&		\
> +				!defined(CONFIG_SPL_WATCHDOG_SUPPORT)
> +				#define WATCHDOG_RESET() {}
> +			#else
> +				extern void watchdog_reset(void);
>   
> -			#define WATCHDOG_RESET watchdog_reset
> +				#define WATCHDOG_RESET watchdog_reset
> +			#endif
>   		#endif
>   	#else
>   		/*
> 

[U-Boot] [PATCH 03/11] serial: atmel_usart: Use fixed clock value in SPL version

[Stefan Roese]

On 20.03.19 08:25, Eugen.Hristev at microchip.com wrote:
> 
> 
> On 19.03.2019 17:56, Stefan Roese wrote:
>> External E-Mail
>>
>>
>> This patch adds an alterative SPL version of atmel_serial_enable_clk().
>> This enables the usage of this driver without full clock support (in
>> drivers and DT nodes). This saves some space in the SPL image.
>>
>> If some boards need a different clock than the one provided with this
>> patch, then support for this needs to be added later.
>>
>> Signed-off-by: Stefan Roese <sr@denx.de>
>> Cc: Heiko Schocher <hs@denx.de>
>> Cc: Andreas Bießmann <andreas@biessmann.org>
>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>> ---
>>    drivers/serial/atmel_usart.c | 12 ++++++++++++
>>    1 file changed, 12 insertions(+)
>>
>> diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
>> index aa8cdff840..049172baef 100644
>> --- a/drivers/serial/atmel_usart.c
>> +++ b/drivers/serial/atmel_usart.c
>> @@ -218,6 +218,17 @@ static const struct dm_serial_ops atmel_serial_ops = {
>>    	.setbrg = atmel_serial_setbrg,
>>    };
>>    
>> +#ifdef CONFIG_SPL_BUILD
>> +static int atmel_serial_enable_clk(struct udevice *dev)
>> +{
>> +	struct atmel_serial_priv *priv = dev_get_priv(dev);
>> +
>> +	/* Use fixed clock value in SPL */
>> +	priv->usart_clk_rate = 132096000;
> 
> Hi Stefan,
> 
> Does this mean that the SPL will work *if and only if* this clock
> matches the board's clock, for all at91 boards? (thus, boards having a
> different clock , the serial will not function correctly anymore ?)

Yes, thats the case (as explained in the commit message above). For
this to work on all boards we need to add some macro like
CONFIG_DEBUG_UART_CLOCK which can be set by each board port
individually.

If agreed on such an idea, I can add this new Kconfig option in a
later version of this patch. Perhaps something like
CONFIG_SPL_UART_CLOCK?

Thanks,
Stefan

[U-Boot] [PATCH 04/11] watchdog: Handle SPL build with watchdog disabled

[Stefan Roese]

On 20.03.19 08:30, Eugen.Hristev at microchip.com wrote:
> 
> 
> On 19.03.2019 17:56, Stefan Roese wrote:
>> External E-Mail
>>
>>
>> This patch adds some checks, so that the watchdog can be enabled in main
>> U-Boot proper but can be disabled in SPL.
> 
> Hi Stefan,
> 
> Actually your code looks at CONFIG_SPL_WATCHDOG_SUPPORT , so , if this
> is disabled in the config, you say that the watchdog was still enabled?
> (thus broken CONFIG_SPL_WATCHDOG_SUPPORT ?)

Yes, in my case here, the watchdog is disabled in SPL and enabled in
main U-Boot proper. This use case is what this patch fixes.

Is this still unclear? Sorry, I didn't fully understand your question.

Thanks,
Stefan
  
> Eugen
> 
>>
>> This will be used by some AT91SAM based boards, which might enable the
>> watchdog in the main U-Boot proper and not in SPL. It will be enabled in
>> SPL by default there, so no need to configure it there. This approach
>> saves some space in SPL.
>>
>> Signed-off-by: Stefan Roese <sr@denx.de>
>> Cc: Heiko Schocher <hs@denx.de>
>> Cc: Andreas Bießmann <andreas@biessmann.org>
>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>> ---
>>    include/watchdog.h | 10 ++++++++--
>>    1 file changed, 8 insertions(+), 2 deletions(-)
>>
>> diff --git a/include/watchdog.h b/include/watchdog.h
>> index 14073cfdd2..3a357de903 100644
>> --- a/include/watchdog.h
>> +++ b/include/watchdog.h
>> @@ -51,9 +51,15 @@ int init_func_watchdog_reset(void);
>>    		#if defined(__ASSEMBLY__)
>>    			#define WATCHDOG_RESET bl watchdog_reset
>>    		#else
>> -			extern void watchdog_reset(void);
>> +			/* Don't require the watchdog to be enabled in SPL */
>> +			#if defined(CONFIG_SPL_BUILD) &&		\
>> +				!defined(CONFIG_SPL_WATCHDOG_SUPPORT)
>> +				#define WATCHDOG_RESET() {}
>> +			#else
>> +				extern void watchdog_reset(void);
>>    
>> -			#define WATCHDOG_RESET watchdog_reset
>> +				#define WATCHDOG_RESET watchdog_reset
>> +			#endif
>>    		#endif
>>    	#else
>>    		/*
>>

Viele Grüße,
Stefan

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de

[U-Boot] [PATCH 04/11] watchdog: Handle SPL build with watchdog disabled

[Eugen.Hristev at microchip.com]

On 20.03.2019 09:33, Stefan Roese wrote:
> External E-Mail
> 
> 
> On 20.03.19 08:30, Eugen.Hristev at microchip.com wrote:
>>
>>
>> On 19.03.2019 17:56, Stefan Roese wrote:
>>> External E-Mail
>>>
>>>
>>> This patch adds some checks, so that the watchdog can be enabled in main
>>> U-Boot proper but can be disabled in SPL.
>>
>> Hi Stefan,
>>
>> Actually your code looks at CONFIG_SPL_WATCHDOG_SUPPORT , so , if this
>> is disabled in the config, you say that the watchdog was still enabled?
>> (thus broken CONFIG_SPL_WATCHDOG_SUPPORT ?)
> 
> Yes, in my case here, the watchdog is disabled in SPL and enabled in
> main U-Boot proper. This use case is what this patch fixes.
> 
> Is this still unclear? Sorry, I didn't fully understand your question.

There is a Kconfig named CONFIG_SPL_WATCHDOG_SUPPORT
If this is y, then the watchdog support should be included in SPL
If this is n, then the watchdog support should not be included in SPL.

Considering your use case, you want CONFIG_SPL_WATCHDOG_SUPPORT=n

Configuring this, the watchdog is still enabled in SPL?

So my question: is the behavior of CONFIG_SPL_WATCHDOG_SUPPORT=n not 
aligned with your use case ? So you are actually fixing the behavior of 
CONFIG_SPL_WATCHDOG_SUPPORT=n ?


> Thanks,
> Stefan
> 
>> Eugen
>>
>>>
>>> This will be used by some AT91SAM based boards, which might enable the
>>> watchdog in the main U-Boot proper and not in SPL. It will be enabled in
>>> SPL by default there, so no need to configure it there. This approach
>>> saves some space in SPL.
>>>
>>> Signed-off-by: Stefan Roese <sr@denx.de>
>>> Cc: Heiko Schocher <hs@denx.de>
>>> Cc: Andreas Bießmann <andreas@biessmann.org>
>>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>>> ---
>>>    include/watchdog.h | 10 ++++++++--
>>>    1 file changed, 8 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/include/watchdog.h b/include/watchdog.h
>>> index 14073cfdd2..3a357de903 100644
>>> --- a/include/watchdog.h
>>> +++ b/include/watchdog.h
>>> @@ -51,9 +51,15 @@ int init_func_watchdog_reset(void);
>>>            #if defined(__ASSEMBLY__)
>>>                #define WATCHDOG_RESET bl watchdog_reset
>>>            #else
>>> -            extern void watchdog_reset(void);
>>> +            /* Don't require the watchdog to be enabled in SPL */
>>> +            #if defined(CONFIG_SPL_BUILD) &&        \
>>> +                !defined(CONFIG_SPL_WATCHDOG_SUPPORT)
>>> +                #define WATCHDOG_RESET() {}
>>> +            #else
>>> +                extern void watchdog_reset(void);
>>> -            #define WATCHDOG_RESET watchdog_reset
>>> +                #define WATCHDOG_RESET watchdog_reset
>>> +            #endif
>>>            #endif
>>>        #else
>>>            /*
>>>
> 
> Viele Grüße,
> Stefan
> 

[U-Boot] [PATCH 04/11] watchdog: Handle SPL build with watchdog disabled

[Stefan Roese]

On 20.03.19 08:41, Eugen.Hristev at microchip.com wrote:
> 
> 
> On 20.03.2019 09:33, Stefan Roese wrote:
>> External E-Mail
>>
>>
>> On 20.03.19 08:30, Eugen.Hristev at microchip.com wrote:
>>>
>>>
>>> On 19.03.2019 17:56, Stefan Roese wrote:
>>>> External E-Mail
>>>>
>>>>
>>>> This patch adds some checks, so that the watchdog can be enabled in main
>>>> U-Boot proper but can be disabled in SPL.
>>>
>>> Hi Stefan,
>>>
>>> Actually your code looks at CONFIG_SPL_WATCHDOG_SUPPORT , so , if this
>>> is disabled in the config, you say that the watchdog was still enabled?
>>> (thus broken CONFIG_SPL_WATCHDOG_SUPPORT ?)
>>
>> Yes, in my case here, the watchdog is disabled in SPL and enabled in
>> main U-Boot proper. This use case is what this patch fixes.
>>
>> Is this still unclear? Sorry, I didn't fully understand your question.
> 
> There is a Kconfig named CONFIG_SPL_WATCHDOG_SUPPORT
> If this is y, then the watchdog support should be included in SPL
> If this is n, then the watchdog support should not be included in SPL.
> 
> Considering your use case, you want CONFIG_SPL_WATCHDOG_SUPPORT=n

Correct.
  
> Configuring this, the watchdog is still enabled in SPL?

I don't want the U-Boot SPL support enabled (mainly because of code
size). AFAIU, the AT91SAM watchdog is enabled by default. So its
enabled in the SoC when SPL is running, as I don't want to disable
it (as done e.g. in AT91Bootrap if configured this way).
  
> So my question: is the behavior of CONFIG_SPL_WATCHDOG_SUPPORT=n not
> aligned with your use case ? So you are actually fixing the behavior of
> CONFIG_SPL_WATCHDOG_SUPPORT=n ?

Yes. Without this patch I do get this build error:

...
   LD      spl/u-boot-spl
lib/built-in.o: In function `udelay':
/home/stefan/git/u-boot/u-boot/lib/time.c:167: undefined reference to `watchdog_reset'
drivers/built-in.o: In function `atmel_nand_pmecc_write_page':
/home/stefan/git/u-boot/u-boot/drivers/mtd/nand/raw/atmel_nand.c:592: undefined reference to `watchdog_reset'
drivers/built-in.o: In function `atmel_nand_pmecc_read_page':
/home/stefan/git/u-boot/u-boot/drivers/mtd/nand/raw/atmel_nand.c:552: undefined reference to `watchdog_reset'
drivers/built-in.o: In function `pmecc_err_location':
/home/stefan/git/u-boot/u-boot/drivers/mtd/nand/raw/atmel_nand.c:416: undefined reference to `watchdog_reset'
scripts/Makefile.spl:384: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1651: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2

Thanks,
Stefan
  
> 
>> Thanks,
>> Stefan
>>
>>> Eugen
>>>
>>>>
>>>> This will be used by some AT91SAM based boards, which might enable the
>>>> watchdog in the main U-Boot proper and not in SPL. It will be enabled in
>>>> SPL by default there, so no need to configure it there. This approach
>>>> saves some space in SPL.
>>>>
>>>> Signed-off-by: Stefan Roese <sr@denx.de>
>>>> Cc: Heiko Schocher <hs@denx.de>
>>>> Cc: Andreas Bießmann <andreas@biessmann.org>
>>>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>>>> ---
>>>>     include/watchdog.h | 10 ++++++++--
>>>>     1 file changed, 8 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/include/watchdog.h b/include/watchdog.h
>>>> index 14073cfdd2..3a357de903 100644
>>>> --- a/include/watchdog.h
>>>> +++ b/include/watchdog.h
>>>> @@ -51,9 +51,15 @@ int init_func_watchdog_reset(void);
>>>>             #if defined(__ASSEMBLY__)
>>>>                 #define WATCHDOG_RESET bl watchdog_reset
>>>>             #else
>>>> -            extern void watchdog_reset(void);
>>>> +            /* Don't require the watchdog to be enabled in SPL */
>>>> +            #if defined(CONFIG_SPL_BUILD) &&        \
>>>> +                !defined(CONFIG_SPL_WATCHDOG_SUPPORT)
>>>> +                #define WATCHDOG_RESET() {}
>>>> +            #else
>>>> +                extern void watchdog_reset(void);
>>>> -            #define WATCHDOG_RESET watchdog_reset
>>>> +                #define WATCHDOG_RESET watchdog_reset
>>>> +            #endif
>>>>             #endif
>>>>         #else
>>>>             /*
>>>>
>>
>> Viele Grüße,
>> Stefan
>>

Viele Grüße,
Stefan

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de

[U-Boot] [PATCH 04/11] watchdog: Handle SPL build with watchdog disabled

[Eugen.Hristev at microchip.com]

On 20.03.2019 09:48, Stefan Roese wrote:
> External E-Mail
> 
> 
> On 20.03.19 08:41, Eugen.Hristev at microchip.com wrote:
>>
>>
>> On 20.03.2019 09:33, Stefan Roese wrote:
>>> External E-Mail
>>>
>>>
>>> On 20.03.19 08:30, Eugen.Hristev at microchip.com wrote:
>>>>
>>>>
>>>> On 19.03.2019 17:56, Stefan Roese wrote:
>>>>> External E-Mail
>>>>>
>>>>>
>>>>> This patch adds some checks, so that the watchdog can be enabled in 
>>>>> main
>>>>> U-Boot proper but can be disabled in SPL.
>>>>
>>>> Hi Stefan,
>>>>
>>>> Actually your code looks at CONFIG_SPL_WATCHDOG_SUPPORT , so , if this
>>>> is disabled in the config, you say that the watchdog was still enabled?
>>>> (thus broken CONFIG_SPL_WATCHDOG_SUPPORT ?)
>>>
>>> Yes, in my case here, the watchdog is disabled in SPL and enabled in
>>> main U-Boot proper. This use case is what this patch fixes.
>>>
>>> Is this still unclear? Sorry, I didn't fully understand your question.
>>
>> There is a Kconfig named CONFIG_SPL_WATCHDOG_SUPPORT
>> If this is y, then the watchdog support should be included in SPL
>> If this is n, then the watchdog support should not be included in SPL.
>>
>> Considering your use case, you want CONFIG_SPL_WATCHDOG_SUPPORT=n
> 
> Correct.
> 
>> Configuring this, the watchdog is still enabled in SPL?
> 
> I don't want the U-Boot SPL support enabled (mainly because of code
> size). AFAIU, the AT91SAM watchdog is enabled by default. So its
> enabled in the SoC when SPL is running, as I don't want to disable
> it (as done e.g. in AT91Bootrap if configured this way).
> 
>> So my question: is the behavior of CONFIG_SPL_WATCHDOG_SUPPORT=n not
>> aligned with your use case ? So you are actually fixing the behavior of
>> CONFIG_SPL_WATCHDOG_SUPPORT=n ?
> 
> Yes. Without this patch I do get this build error:
> 
> ...
>    LD      spl/u-boot-spl
> lib/built-in.o: In function `udelay':
> /home/stefan/git/u-boot/u-boot/lib/time.c:167: undefined reference to 
> `watchdog_reset'
> drivers/built-in.o: In function `atmel_nand_pmecc_write_page':
> /home/stefan/git/u-boot/u-boot/drivers/mtd/nand/raw/atmel_nand.c:592: 
> undefined reference to `watchdog_reset'
> drivers/built-in.o: In function `atmel_nand_pmecc_read_page':
> /home/stefan/git/u-boot/u-boot/drivers/mtd/nand/raw/atmel_nand.c:552: 
> undefined reference to `watchdog_reset'
> drivers/built-in.o: In function `pmecc_err_location':
> /home/stefan/git/u-boot/u-boot/drivers/mtd/nand/raw/atmel_nand.c:416: 
> undefined reference to `watchdog_reset'
> scripts/Makefile.spl:384: recipe for target 'spl/u-boot-spl' failed
> make[1]: *** [spl/u-boot-spl] Error 1
> Makefile:1651: recipe for target 'spl/u-boot-spl' failed
> make: *** [spl/u-boot-spl] Error 2
> 

OK so that's what I want to settle: you are actually fixing the issue of 
CONFIG_SPL_WATCHDOG_SUPPORT=n not working properly

Also, we may have to look inside the atmel_nand.c as it may be affected?

Thanks,
Eugen

> Thanks,
> Stefan
> 
>>
>>> Thanks,
>>> Stefan
>>>
>>>> Eugen
>>>>
>>>>>
>>>>> This will be used by some AT91SAM based boards, which might enable the
>>>>> watchdog in the main U-Boot proper and not in SPL. It will be 
>>>>> enabled in
>>>>> SPL by default there, so no need to configure it there. This approach
>>>>> saves some space in SPL.
>>>>>
>>>>> Signed-off-by: Stefan Roese <sr@denx.de>
>>>>> Cc: Heiko Schocher <hs@denx.de>
>>>>> Cc: Andreas Bießmann <andreas@biessmann.org>
>>>>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>>>>> ---
>>>>>     include/watchdog.h | 10 ++++++++--
>>>>>     1 file changed, 8 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/include/watchdog.h b/include/watchdog.h
>>>>> index 14073cfdd2..3a357de903 100644
>>>>> --- a/include/watchdog.h
>>>>> +++ b/include/watchdog.h
>>>>> @@ -51,9 +51,15 @@ int init_func_watchdog_reset(void);
>>>>>             #if defined(__ASSEMBLY__)
>>>>>                 #define WATCHDOG_RESET bl watchdog_reset
>>>>>             #else
>>>>> -            extern void watchdog_reset(void);
>>>>> +            /* Don't require the watchdog to be enabled in SPL */
>>>>> +            #if defined(CONFIG_SPL_BUILD) &&        \
>>>>> +                !defined(CONFIG_SPL_WATCHDOG_SUPPORT)
>>>>> +                #define WATCHDOG_RESET() {}
>>>>> +            #else
>>>>> +                extern void watchdog_reset(void);
>>>>> -            #define WATCHDOG_RESET watchdog_reset
>>>>> +                #define WATCHDOG_RESET watchdog_reset
>>>>> +            #endif
>>>>>             #endif
>>>>>         #else
>>>>>             /*
>>>>>
>>>
>>> Viele Grüße,
>>> Stefan
>>>
> 
> Viele Grüße,
> Stefan
> 

[U-Boot] [PATCH 04/11] watchdog: Handle SPL build with watchdog disabled

[Stefan Roese]

On 20.03.19 09:06, Eugen.Hristev at microchip.com wrote:

<snip>

>>> So my question: is the behavior of CONFIG_SPL_WATCHDOG_SUPPORT=n not
>>> aligned with your use case ? So you are actually fixing the behavior of
>>> CONFIG_SPL_WATCHDOG_SUPPORT=n ?
>>
>> Yes. Without this patch I do get this build error:
>>
>> ...
>>     LD      spl/u-boot-spl
>> lib/built-in.o: In function `udelay':
>> /home/stefan/git/u-boot/u-boot/lib/time.c:167: undefined reference to
>> `watchdog_reset'
>> drivers/built-in.o: In function `atmel_nand_pmecc_write_page':
>> /home/stefan/git/u-boot/u-boot/drivers/mtd/nand/raw/atmel_nand.c:592:
>> undefined reference to `watchdog_reset'
>> drivers/built-in.o: In function `atmel_nand_pmecc_read_page':
>> /home/stefan/git/u-boot/u-boot/drivers/mtd/nand/raw/atmel_nand.c:552:
>> undefined reference to `watchdog_reset'
>> drivers/built-in.o: In function `pmecc_err_location':
>> /home/stefan/git/u-boot/u-boot/drivers/mtd/nand/raw/atmel_nand.c:416:
>> undefined reference to `watchdog_reset'
>> scripts/Makefile.spl:384: recipe for target 'spl/u-boot-spl' failed
>> make[1]: *** [spl/u-boot-spl] Error 1
>> Makefile:1651: recipe for target 'spl/u-boot-spl' failed
>> make: *** [spl/u-boot-spl] Error 2
>>
> 
> OK so that's what I want to settle: you are actually fixing the issue of
> CONFIG_SPL_WATCHDOG_SUPPORT=n not working properly

Yes, its *not* a AT91 specific issue. Its a general issue of the
code.
  
> Also, we may have to look inside the atmel_nand.c as it may be affected?

Affected in which way? You mean that the watchdog might time out
while loading the main U-Boot proper from NAND? Or what are you
referring to?

Thanks,
Stefan

[U-Boot] [PATCH 06/11] arm: at91: Enable watchdog support

[Eugen.Hristev at microchip.com]

On 19.03.2019 17:56, Stefan Roese wrote:
> External E-Mail
> 
> 
> This patch enables and starts the watchdog on the AT91 platform if
> configured. Currently the WD timeout is configured to 16 seconds,
> which is the longest value for this timer.
> 
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Heiko Schocher <hs@denx.de>
> Cc: Andreas Bießmann <andreas@biessmann.org>
> Cc: Eugen Hristev <eugen.hristev@microchip.com>
> ---
>   arch/arm/mach-at91/clock.c | 41 ++++++++++++++++++++++++++++++++++++++
>   1 file changed, 41 insertions(+)
> 
> diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
> index 64cbc3d1ed..2d442d0092 100644
> --- a/arch/arm/mach-at91/clock.c
> +++ b/arch/arm/mach-at91/clock.c
> @@ -5,6 +5,8 @@
>    */
>   
>   #include <common.h>
> +#include <dm.h>
> +#include <wdt.h>
>   #include <asm/io.h>
>   #include <asm/arch/hardware.h>
>   #include <asm/arch/at91_pmc.h>
> @@ -118,3 +120,42 @@ void at91_pllicpr_init(u32 icpr)
>   
>   	writel(icpr, &pmc->pllicpr);
>   }
> +
> +#if defined(CONFIG_WATCHDOG) && !defined(CONFIG_SPL_BUILD)

Hi Stefan,

Does this mean that for CONFIG_SPL_BUILD, this functions won't exist, 
thus the SPL cannot use the watchdog ?

For example, configuring CONFIG_SPL_WATCHDOG_SUPPORT=y
makes SPL build fail :

drivers/built-in.o: In function `atmel_nand_pmecc_write_page':
/home/eugen/u-boot-denx/drivers/mtd/nand/raw/atmel_nand.c:592: undefined 
reference to `watchdog_reset'
drivers/built-in.o: In function `atmel_nand_pmecc_read_page':
/home/eugen/u-boot-denx/drivers/mtd/nand/raw/atmel_nand.c:552: undefined 
reference to `watchdog_reset'
drivers/built-in.o: In function `pmecc_err_location':
/home/eugen/u-boot-denx/drivers/mtd/nand/raw/atmel_nand.c:416: undefined 
reference to `watchdog_reset'
scripts/Makefile.spl:384: recipe for target 'spl/u-boot-spl' failed


> +static struct udevice *watchdog_dev;
> +
> +/* Called by macro WATCHDOG_RESET */
> +void watchdog_reset(void)
> +{
> +	static ulong next_reset;
> +	ulong now;
> +
> +	if (!watchdog_dev)
> +		return;
> +
> +	now = get_timer(0);
> +
> +	/* Do not reset the watchdog too often */
> +	if (now > next_reset) {
> +		next_reset = now + 1000;	/* reset every 1000ms */
> +		wdt_reset(watchdog_dev);
> +	}
> +}
> +
> +int arch_misc_init(void)
> +{
> +	/* Init watchdog */
> +	if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
> +		debug("Watchdog: Not found by seq!\n");
> +		if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
> +			puts("Watchdog: Not found!\n");
> +			return 0;
> +		}
> +	}
> +
> +	wdt_start(watchdog_dev, 16000, 0);	/* 16 seconds is max */
> +	printf("Watchdog: Started\n");
> +

Any reason why you use printf and puts and debug in the same function ? 
Would expect to see debug everywhere except some fatal error that should 
be printed all the time.

Eugen

> +	return 0;
> +}
> +#endif
> 

[U-Boot] [PATCH 06/11] arm: at91: Enable watchdog support

[Stefan Roese]

On 21.03.19 11:23, Eugen.Hristev at microchip.com wrote:
> 
> 
> On 19.03.2019 17:56, Stefan Roese wrote:
>> External E-Mail
>>
>>
>> This patch enables and starts the watchdog on the AT91 platform if
>> configured. Currently the WD timeout is configured to 16 seconds,
>> which is the longest value for this timer.
>>
>> Signed-off-by: Stefan Roese <sr@denx.de>
>> Cc: Heiko Schocher <hs@denx.de>
>> Cc: Andreas Bießmann <andreas@biessmann.org>
>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>> ---
>>    arch/arm/mach-at91/clock.c | 41 ++++++++++++++++++++++++++++++++++++++
>>    1 file changed, 41 insertions(+)
>>
>> diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
>> index 64cbc3d1ed..2d442d0092 100644
>> --- a/arch/arm/mach-at91/clock.c
>> +++ b/arch/arm/mach-at91/clock.c
>> @@ -5,6 +5,8 @@
>>     */
>>    
>>    #include <common.h>
>> +#include <dm.h>
>> +#include <wdt.h>
>>    #include <asm/io.h>
>>    #include <asm/arch/hardware.h>
>>    #include <asm/arch/at91_pmc.h>
>> @@ -118,3 +120,42 @@ void at91_pllicpr_init(u32 icpr)
>>    
>>    	writel(icpr, &pmc->pllicpr);
>>    }
>> +
>> +#if defined(CONFIG_WATCHDOG) && !defined(CONFIG_SPL_BUILD)
> 
> Hi Stefan,
> 
> Does this mean that for CONFIG_SPL_BUILD, this functions won't exist,
> thus the SPL cannot use the watchdog ?
> 
> For example, configuring CONFIG_SPL_WATCHDOG_SUPPORT=y
> makes SPL build fail :
> 
> drivers/built-in.o: In function `atmel_nand_pmecc_write_page':
> /home/eugen/u-boot-denx/drivers/mtd/nand/raw/atmel_nand.c:592: undefined
> reference to `watchdog_reset'
> drivers/built-in.o: In function `atmel_nand_pmecc_read_page':
> /home/eugen/u-boot-denx/drivers/mtd/nand/raw/atmel_nand.c:552: undefined
> reference to `watchdog_reset'
> drivers/built-in.o: In function `pmecc_err_location':
> /home/eugen/u-boot-denx/drivers/mtd/nand/raw/atmel_nand.c:416: undefined
> reference to `watchdog_reset'
> scripts/Makefile.spl:384: recipe for target 'spl/u-boot-spl' failed

Let me see, if I can change this so that this code is
available if selected in SPL as well. Even though arch_misc_init()
will not be called, so the watchdog will not be started.

But the code looks cleaner without this #ifdef and if you agree, I
will send v2 soon with this change.
  
> 
>> +static struct udevice *watchdog_dev;
>> +
>> +/* Called by macro WATCHDOG_RESET */
>> +void watchdog_reset(void)
>> +{
>> +	static ulong next_reset;
>> +	ulong now;
>> +
>> +	if (!watchdog_dev)
>> +		return;
>> +
>> +	now = get_timer(0);
>> +
>> +	/* Do not reset the watchdog too often */
>> +	if (now > next_reset) {
>> +		next_reset = now + 1000;	/* reset every 1000ms */
>> +		wdt_reset(watchdog_dev);
>> +	}
>> +}
>> +
>> +int arch_misc_init(void)
>> +{
>> +	/* Init watchdog */
>> +	if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
>> +		debug("Watchdog: Not found by seq!\n");
>> +		if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
>> +			puts("Watchdog: Not found!\n");
>> +			return 0;
>> +		}
>> +	}
>> +
>> +	wdt_start(watchdog_dev, 16000, 0);	/* 16 seconds is max */
>> +	printf("Watchdog: Started\n");
>> +
> 
> Any reason why you use printf and puts and debug in the same function ?
> Would expect to see debug everywhere except some fatal error that should
> be printed all the time.

Good catch. This is copy-pasted from other very similar implementations.
I personally find this last status message "Watchdog: Started" quite
useful and would like to keep it. All others might be changed to debug().

Thanks,
Stefan

[U-Boot] [PATCH 06/11] arm: at91: Enable watchdog support

[Eugen.Hristev at microchip.com]

On 21.03.2019 14:00, Stefan Roese wrote:
> External E-Mail
> 
> 
> On 21.03.19 11:23, Eugen.Hristev at microchip.com wrote:
>>
>>
>> On 19.03.2019 17:56, Stefan Roese wrote:
>>> External E-Mail
>>>
>>>
>>> This patch enables and starts the watchdog on the AT91 platform if
>>> configured. Currently the WD timeout is configured to 16 seconds,
>>> which is the longest value for this timer.
>>>
>>> Signed-off-by: Stefan Roese <sr@denx.de>
>>> Cc: Heiko Schocher <hs@denx.de>
>>> Cc: Andreas Bießmann <andreas@biessmann.org>
>>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>>> ---
>>>    arch/arm/mach-at91/clock.c | 41 
>>> ++++++++++++++++++++++++++++++++++++++
>>>    1 file changed, 41 insertions(+)
>>>
>>> diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
>>> index 64cbc3d1ed..2d442d0092 100644
>>> --- a/arch/arm/mach-at91/clock.c
>>> +++ b/arch/arm/mach-at91/clock.c
>>> @@ -5,6 +5,8 @@
>>>     */
>>>    #include <common.h>
>>> +#include <dm.h>
>>> +#include <wdt.h>
>>>    #include <asm/io.h>
>>>    #include <asm/arch/hardware.h>
>>>    #include <asm/arch/at91_pmc.h>
>>> @@ -118,3 +120,42 @@ void at91_pllicpr_init(u32 icpr)
>>>        writel(icpr, &pmc->pllicpr);
>>>    }
>>> +
>>> +#if defined(CONFIG_WATCHDOG) && !defined(CONFIG_SPL_BUILD)
>>
>> Hi Stefan,
>>
>> Does this mean that for CONFIG_SPL_BUILD, this functions won't exist,
>> thus the SPL cannot use the watchdog ?
>>
>> For example, configuring CONFIG_SPL_WATCHDOG_SUPPORT=y
>> makes SPL build fail :
>>
>> drivers/built-in.o: In function `atmel_nand_pmecc_write_page':
>> /home/eugen/u-boot-denx/drivers/mtd/nand/raw/atmel_nand.c:592: undefined
>> reference to `watchdog_reset'
>> drivers/built-in.o: In function `atmel_nand_pmecc_read_page':
>> /home/eugen/u-boot-denx/drivers/mtd/nand/raw/atmel_nand.c:552: undefined
>> reference to `watchdog_reset'
>> drivers/built-in.o: In function `pmecc_err_location':
>> /home/eugen/u-boot-denx/drivers/mtd/nand/raw/atmel_nand.c:416: undefined
>> reference to `watchdog_reset'
>> scripts/Makefile.spl:384: recipe for target 'spl/u-boot-spl' failed
> 
> Let me see, if I can change this so that this code is
> available if selected in SPL as well. Even though arch_misc_init()
> will not be called, so the watchdog will not be started.

It should at least build :)

> 
> But the code looks cleaner without this #ifdef and if you agree, I
> will send v2 soon with this change.

I did not have time to review all the patch series yet. So more reviews 
will follow

> 
>>
>>> +static struct udevice *watchdog_dev;
>>> +
>>> +/* Called by macro WATCHDOG_RESET */
>>> +void watchdog_reset(void)
>>> +{
>>> +    static ulong next_reset;
>>> +    ulong now;
>>> +
>>> +    if (!watchdog_dev)
>>> +        return;
>>> +
>>> +    now = get_timer(0);
>>> +
>>> +    /* Do not reset the watchdog too often */
>>> +    if (now > next_reset) {
>>> +        next_reset = now + 1000;    /* reset every 1000ms */
>>> +        wdt_reset(watchdog_dev);
>>> +    }
>>> +}
>>> +
>>> +int arch_misc_init(void)
>>> +{
>>> +    /* Init watchdog */
>>> +    if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
>>> +        debug("Watchdog: Not found by seq!\n");
>>> +        if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
>>> +            puts("Watchdog: Not found!\n");
>>> +            return 0;
>>> +        }
>>> +    }
>>> +
>>> +    wdt_start(watchdog_dev, 16000, 0);    /* 16 seconds is max */
>>> +    printf("Watchdog: Started\n");
>>> +
>>
>> Any reason why you use printf and puts and debug in the same function ?
>> Would expect to see debug everywhere except some fatal error that should
>> be printed all the time.
> 
> Good catch. This is copy-pasted from other very similar implementations.
> I personally find this last status message "Watchdog: Started" quite
> useful and would like to keep it. All others might be changed to debug().

I do not mind if you keep it

Eugen

> 
> Thanks,
> Stefan

[U-Boot] [PATCH 08/11] Makefile.spl: Move generate AT91SAM NAND image boot.bin to spl directory

[Eugen.Hristev at microchip.com]

On 19.03.2019 17:56, Stefan Roese wrote:
> External E-Mail
> 
> 
> This patch moves the AT91SAM NAND booting SPL image "boot.bin" which
> includes the ECC values from the root directory into the spl directory,
> where all SPL related images are located.

Hi Stefan,

Yes, indeed, but someone may be using this fact? Removing it might break 
someone's expectations (scripts). Can we make a copy to spl/ dir and 
leave the boot.bin in the root as-is ?
Unless someone has objections of course...

Eugen

> 
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Heiko Schocher <hs@denx.de>
> Cc: Andreas Bießmann <andreas@biessmann.org>
> Cc: Eugen Hristev <eugen.hristev@microchip.com>
> ---
>   scripts/Makefile.spl | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
> index 9d5921606e..37be18da4b 100644
> --- a/scripts/Makefile.spl
> +++ b/scripts/Makefile.spl
> @@ -179,10 +179,10 @@ MKIMAGEFLAGS_boot.bin = -T atmelimage
>   ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y)
>   MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params)
>   
> -boot.bin: $(obj)/../tools/atmel_pmecc_params
> +$(obj)/boot.bin: $(obj)/../tools/atmel_pmecc_params
>   endif
>   
> -boot.bin: $(obj)/u-boot-spl.bin FORCE
> +$(obj)/boot.bin: $(obj)/u-boot-spl.bin FORCE
>   	$(call if_changed,mkimage)
>   else
>   ifdef CONFIG_ARCH_ZYNQ
> @@ -225,7 +225,7 @@ endif
>   endif
>   
>   ifeq ($(CONFIG_SYS_SOC),"at91")
> -ALL-y	+= boot.bin
> +ALL-y	+= $(obj)/boot.bin
>   endif
>   
>   ALL-$(CONFIG_SPL_X86_16BIT_INIT) += $(obj)/u-boot-x86-16bit-spl.bin
> 

[U-Boot] [PATCH 08/11] Makefile.spl: Move generate AT91SAM NAND image boot.bin to spl directory

[Stefan Roese]

On 25.03.19 15:22, Eugen.Hristev at microchip.com wrote:
> 
> 
> On 19.03.2019 17:56, Stefan Roese wrote:
>> External E-Mail
>>
>>
>> This patch moves the AT91SAM NAND booting SPL image "boot.bin" which
>> includes the ECC values from the root directory into the spl directory,
>> where all SPL related images are located.
> 
> Hi Stefan,
> 
> Yes, indeed, but someone may be using this fact? Removing it might break
> someone's expectations (scripts). Can we make a copy to spl/ dir and
> leave the boot.bin in the root as-is ?

That would be possible, but I find the solution to move the file
to the correct directory cleaner / better. Who uses this image?
I'm pretty sure that Heiko does.

Heiko, do you have any comments on this SPL binary file move? Is
somebody else using it?

Thanks,
Stefan

> Unless someone has objections of course...
> 
> Eugen
> 
>>
>> Signed-off-by: Stefan Roese <sr@denx.de>
>> Cc: Heiko Schocher <hs@denx.de>
>> Cc: Andreas Bießmann <andreas@biessmann.org>
>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>> ---
>>    scripts/Makefile.spl | 6 +++---
>>    1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
>> index 9d5921606e..37be18da4b 100644
>> --- a/scripts/Makefile.spl
>> +++ b/scripts/Makefile.spl
>> @@ -179,10 +179,10 @@ MKIMAGEFLAGS_boot.bin = -T atmelimage
>>    ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y)
>>    MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params)
>>    
>> -boot.bin: $(obj)/../tools/atmel_pmecc_params
>> +$(obj)/boot.bin: $(obj)/../tools/atmel_pmecc_params
>>    endif
>>    
>> -boot.bin: $(obj)/u-boot-spl.bin FORCE
>> +$(obj)/boot.bin: $(obj)/u-boot-spl.bin FORCE
>>    	$(call if_changed,mkimage)
>>    else
>>    ifdef CONFIG_ARCH_ZYNQ
>> @@ -225,7 +225,7 @@ endif
>>    endif
>>    
>>    ifeq ($(CONFIG_SYS_SOC),"at91")
>> -ALL-y	+= boot.bin
>> +ALL-y	+= $(obj)/boot.bin
>>    endif
>>    
>>    ALL-$(CONFIG_SPL_X86_16BIT_INIT) += $(obj)/u-boot-x86-16bit-spl.bin
>>

Viele Grüße,
Stefan

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de

[U-Boot] [PATCH 03/11] serial: atmel_usart: Use fixed clock value in SPL version

[Eugen.Hristev at microchip.com]

On 20.03.2019 09:30, Stefan Roese wrote:
> 
> On 20.03.19 08:25, Eugen.Hristev at microchip.com wrote:
>>
>>
>> On 19.03.2019 17:56, Stefan Roese wrote:
>>> External E-Mail
>>>
>>>
>>> This patch adds an alterative SPL version of atmel_serial_enable_clk().
>>> This enables the usage of this driver without full clock support (in
>>> drivers and DT nodes). This saves some space in the SPL image.
>>>
>>> If some boards need a different clock than the one provided with this
>>> patch, then support for this needs to be added later.
>>>
>>> Signed-off-by: Stefan Roese <sr@denx.de>
>>> Cc: Heiko Schocher <hs@denx.de>
>>> Cc: Andreas Bießmann <andreas@biessmann.org>
>>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>>> ---
>>>    drivers/serial/atmel_usart.c | 12 ++++++++++++
>>>    1 file changed, 12 insertions(+)
>>>
>>> diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
>>> index aa8cdff840..049172baef 100644
>>> --- a/drivers/serial/atmel_usart.c
>>> +++ b/drivers/serial/atmel_usart.c
>>> @@ -218,6 +218,17 @@ static const struct dm_serial_ops 
>>> atmel_serial_ops = {
>>>        .setbrg = atmel_serial_setbrg,
>>>    };
>>> +#ifdef CONFIG_SPL_BUILD
>>> +static int atmel_serial_enable_clk(struct udevice *dev)
>>> +{
>>> +    struct atmel_serial_priv *priv = dev_get_priv(dev);
>>> +
>>> +    /* Use fixed clock value in SPL */
>>> +    priv->usart_clk_rate = 132096000;
>>
>> Hi Stefan,
>>
>> Does this mean that the SPL will work *if and only if* this clock
>> matches the board's clock, for all at91 boards? (thus, boards having a
>> different clock , the serial will not function correctly anymore ?)
> 
> Yes, thats the case (as explained in the commit message above). For
> this to work on all boards we need to add some macro like
> CONFIG_DEBUG_UART_CLOCK which can be set by each board port
> individually.
> 
> If agreed on such an idea, I can add this new Kconfig option in a
> later version of this patch. Perhaps something like
> CONFIG_SPL_UART_CLOCK?

If this breaks the serial for the other boards... it's not good.
I think either we do a patch that fixes a thing, but does not break 
other functionality... or we leave it as is.
Would hate to see serial failing on all other SPLs

How big is the SPL reduction with this ?
Maybe just keep old code in case CONFIG_SPL_UART_CLOCK is *not* defined ?
and if defined, use the hardcoded value from config ?

Eugen
> 
> Thanks,
> Stefan

[U-Boot] [PATCH 03/11] serial: atmel_usart: Use fixed clock value in SPL version

[Stefan Roese]

On 25.03.19 15:27, Eugen.Hristev at microchip.com wrote:
> 
> 
> On 20.03.2019 09:30, Stefan Roese wrote:
>>
>> On 20.03.19 08:25, Eugen.Hristev at microchip.com wrote:
>>>
>>>
>>> On 19.03.2019 17:56, Stefan Roese wrote:
>>>> External E-Mail
>>>>
>>>>
>>>> This patch adds an alterative SPL version of atmel_serial_enable_clk().
>>>> This enables the usage of this driver without full clock support (in
>>>> drivers and DT nodes). This saves some space in the SPL image.
>>>>
>>>> If some boards need a different clock than the one provided with this
>>>> patch, then support for this needs to be added later.
>>>>
>>>> Signed-off-by: Stefan Roese <sr@denx.de>
>>>> Cc: Heiko Schocher <hs@denx.de>
>>>> Cc: Andreas Bießmann <andreas@biessmann.org>
>>>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>>>> ---
>>>>     drivers/serial/atmel_usart.c | 12 ++++++++++++
>>>>     1 file changed, 12 insertions(+)
>>>>
>>>> diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
>>>> index aa8cdff840..049172baef 100644
>>>> --- a/drivers/serial/atmel_usart.c
>>>> +++ b/drivers/serial/atmel_usart.c
>>>> @@ -218,6 +218,17 @@ static const struct dm_serial_ops
>>>> atmel_serial_ops = {
>>>>         .setbrg = atmel_serial_setbrg,
>>>>     };
>>>> +#ifdef CONFIG_SPL_BUILD
>>>> +static int atmel_serial_enable_clk(struct udevice *dev)
>>>> +{
>>>> +    struct atmel_serial_priv *priv = dev_get_priv(dev);
>>>> +
>>>> +    /* Use fixed clock value in SPL */
>>>> +    priv->usart_clk_rate = 132096000;
>>>
>>> Hi Stefan,
>>>
>>> Does this mean that the SPL will work *if and only if* this clock
>>> matches the board's clock, for all at91 boards? (thus, boards having a
>>> different clock , the serial will not function correctly anymore ?)
>>
>> Yes, thats the case (as explained in the commit message above). For
>> this to work on all boards we need to add some macro like
>> CONFIG_DEBUG_UART_CLOCK which can be set by each board port
>> individually.
>>
>> If agreed on such an idea, I can add this new Kconfig option in a
>> later version of this patch. Perhaps something like
>> CONFIG_SPL_UART_CLOCK?
> 
> If this breaks the serial for the other boards... it's not good.

Currently it breaks no other board port, as no other board port uses
SPL with DM_SERIAL support on AT91, AFAICT. So no breakage is introduced
with this patch (please correct me if I'm wrong).

> I think either we do a patch that fixes a thing, but does not break
> other functionality... or we leave it as is.
> Would hate to see serial failing on all other SPLs

Again, this is only for ports that will move to DM_SERIAL in SPL in
the future.
  
> How big is the SPL reduction with this ?

Frankly I can't tell.

> Maybe just keep old code in case CONFIG_SPL_UART_CLOCK is *not* defined ?
> and if defined, use the hardcoded value from config ?

Which old code are you referring to? Again, this code is new for the
newly introduced SPL & DM_SERIAL support in this driver.

Thanks,
Stefan

[U-Boot] [PATCH 08/11] Makefile.spl: Move generate AT91SAM NAND image boot.bin to spl directory

[Heiko Schocher]

Hello Stefan,

Am 25.03.2019 um 15:24 schrieb Stefan Roese:
> On 25.03.19 15:22, Eugen.Hristev at microchip.com wrote:
>>
>>
>> On 19.03.2019 17:56, Stefan Roese wrote:
>>> External E-Mail
>>>
>>>
>>> This patch moves the AT91SAM NAND booting SPL image "boot.bin" which
>>> includes the ECC values from the root directory into the spl directory,
>>> where all SPL related images are located.
>>
>> Hi Stefan,
>>
>> Yes, indeed, but someone may be using this fact? Removing it might break
>> someone's expectations (scripts). Can we make a copy to spl/ dir and
>> leave the boot.bin in the root as-is ?
> 
> That would be possible, but I find the solution to move the file
> to the correct directory cleaner / better. Who uses this image?
> I'm pretty sure that Heiko does.
> 
> Heiko, do you have any comments on this SPL binary file move? Is
> somebody else using it?

I am fine with this move, as I also think, spl directory is the
correct place for it. Yes, I have some scripts, but they are
fixed very fast.

Acked-by: Heiko Schocher<hs@denx.de>

bye,
Heiko
> 
> Thanks,
> Stefan
> 
>> Unless someone has objections of course...
>>
>> Eugen
>>
>>>
>>> Signed-off-by: Stefan Roese <sr@denx.de>
>>> Cc: Heiko Schocher <hs@denx.de>
>>> Cc: Andreas Bießmann <andreas@biessmann.org>
>>> Cc: Eugen Hristev <eugen.hristev@microchip.com>
>>> ---
>>>    scripts/Makefile.spl | 6 +++---
>>>    1 file changed, 3 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
>>> index 9d5921606e..37be18da4b 100644
>>> --- a/scripts/Makefile.spl
>>> +++ b/scripts/Makefile.spl
>>> @@ -179,10 +179,10 @@ MKIMAGEFLAGS_boot.bin = -T atmelimage
>>>    ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y)
>>>    MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params)
>>> -boot.bin: $(obj)/../tools/atmel_pmecc_params
>>> +$(obj)/boot.bin: $(obj)/../tools/atmel_pmecc_params
>>>    endif
>>> -boot.bin: $(obj)/u-boot-spl.bin FORCE
>>> +$(obj)/boot.bin: $(obj)/u-boot-spl.bin FORCE
>>>        $(call if_changed,mkimage)
>>>    else
>>>    ifdef CONFIG_ARCH_ZYNQ
>>> @@ -225,7 +225,7 @@ endif
>>>    endif
>>>    ifeq ($(CONFIG_SYS_SOC),"at91")
>>> -ALL-y    += boot.bin
>>> +ALL-y    += $(obj)/boot.bin
>>>    endif
>>>    ALL-$(CONFIG_SPL_X86_16BIT_INIT) += $(obj)/u-boot-x86-16bit-spl.bin
>>>
> 
> Viele Grüße,
> Stefan
> 

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: hs at denx.de