[PATCH v1 2/8] spi: dw: Add device tree properties for fields in CTRL0

Marek Vasut
2020-03-22T04:22:29Z

On 3/22/20 4:33 AM, Sean Anderson wrote:
> On 3/21/20 11:13 PM, Marek Vasut wrote:
>> On 3/22/20 4:08 AM, Sean Anderson wrote:
>>> On 3/21/20 11:04 PM, Marek Vasut wrote:
>>>> Could be a different revision of the IP. This is usually handled by
>>>> using SoC-specific compatible strings, see e.g. Linux
>>>> Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml
>>>>
>>>> You don't want to encode register layout in the DT.
>>>
>>> Ok, then I think adding compatible strings would be the cleanest.
>>>
>>>>
>>>>> It is possible to
>>>>> add several compatible strings like "kendryte,k210-spi3".
>>>>
>>>> Why ?
>>>
>>> See below.
>>>
>>>>
>>>>> I chose this
>>>>> method because the bitfields are different for spi0 and spi1, spi2, and
>>>>> spi3. If there are other incompatibilities discovered, then it may make
>>>>> more sense to use different strings. Another option could have been to
>>>>> use the DW_SPI_VERSION field to detect different controllers, but it is
>>>>> the same among all the controllers on the K210.
>>>>
>>>> The controllers on the same SoC have different register layout ?
>>>>
>>>
>>> Yup!
>>>
>>> Don't ask me why.
>>
>> Now that is truly an odd design. Is there a datasheet for this SoC ?
>
> Nope. Everything has been done referencing their sdk.
>
> In hindsight, porting this board was a poor decision because of all the
> hoops I've had to jump through due to the absence of documentation.
> Unfortunately, it's probably the only budget risc-v board with S-mode
> until the end of the year or so.
>
>> You might be able to somehow enumerate those controllers in DT and
>> derive their layout from that enumeration or somesuch I think.
>
> So like derive it from the sequence number? I'd rather do this in a more
> standard way, if possible.

I would rather like to know why do the controllers have different
register layout.