From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nicolas Saenz Julienne Date: Tue, 28 Apr 2020 15:59:02 +0200 Subject: [PATCH v1 09/10] pci: Add driver for Broadcom STB PCIe controller In-Reply-To: <20200424165012.31915-10-s.nawrocki@samsung.com> References: <20200424165012.31915-1-s.nawrocki@samsung.com> <20200424165012.31915-10-s.nawrocki@samsung.com> Message-ID: <6d97bda2d7b3d5893de1e7fa4aa78d9322372dec.camel@suse.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Sylwester, On Fri, 2020-04-24 at 18:50 +0200, Sylwester Nawrocki wrote: > This patch adds basic driver for the Broadcom STB PCIe host controller. > The code is based on Linux upstream driver (pcie-brcmstb.c) with MSI > handling removed. The inbound access memory region is not currently > parsed from dma-ranges DT property and a fixed 4GB region is used. > > The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805 > USB Host Controller. > > Signed-off-by: Nicolas Saenz Julienne > Signed-off-by: Sylwester Nawrocki > --- > Changes since RFC: > - reworked to align with current Linux mainline version and u-boot driver > by Nicolas Saenz Julienne [...] > + > + /* > + * For config space accesses on the RC, show the right class for > + * a PCIe-PCIe bridge (the default setting is to be EP mode). > + */ > + tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3); > + u32p_replace_bits(&tmp, 0x060400, > + PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK); > + writel(tmp, base + PCIE_RC_CFG_PRIV1_ID_VAL3); > + > + if (pcie->ssc) { > + ret = brcm_pcie_set_ssc(base); This call should be like this: ret = brcm_pcie_set_ssc(pcie); It builds alright since base is a void pointer. But it obvioulsy causes issues further down the line. Regards, Nicolas -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 488 bytes Desc: This is a digitally signed message part URL: