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[108.18.248.138]) by smtp.googlemail.com with ESMTPSA id 10-20020a05620a078a00b0069fc167df92sm1422133qka.82.2022.05.11.09.48.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 11 May 2022 09:48:17 -0700 (PDT) Subject: Re: [PATCH 1/3] phy: stm32-usbphyc: add counter of PLL consumer To: Amelie Delaunay , Patrick DELAUNAY , u-boot@lists.denx.de Cc: Joe Hershberger , Patrice Chotard , uboot-stm32@st-md-mailman.stormreply.com References: <20220426123750.579726-1-patrick.delaunay@foss.st.com> <20220426143736.1.I15bd7c3c8c983d6a6cec3d2ee371d75fe72fcd41@changeid> <27373592-d6c9-ff00-799b-a2f04f4500b1@gmail.com> <0aeffe8a-b73a-5e3d-de89-9938d8d53150@foss.st.com> <8776d357-028b-0d21-cb90-4cbdd73f4ffb@foss.st.com> From: Sean Anderson Message-ID: <78061a89-ab5e-af21-d02a-9deeece3e454@gmail.com> Date: Wed, 11 May 2022 12:48:17 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <8776d357-028b-0d21-cb90-4cbdd73f4ffb@foss.st.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On 5/10/22 5:51 AM, Amelie Delaunay wrote: > Hi Patrick, > Hi Sean, >=20 > On 5/9/22 16:37, Patrick DELAUNAY wrote: >> Hi Sean, >> >> On 5/8/22 20:21, Sean Anderson wrote: >>> On 4/26/22 8:37 AM, Patrick Delaunay wrote: >>>> Add the counter of the PLL user n_pll_cons managed by the 2 function= s >>>> stm32_usbphyc_pll_enable / stm32_usbphyc_pll_disable. >>>> >>>> This counter allow to remove the function stm32_usbphyc_is_init >>>> and it is a preliminary step for ck_usbo_48m introduction. >>> >>> Is it necessary to disable this clock before booting to Linux? If it = isn't, >>> then perhaps it is simpler to just not disable the clock. >>> >>> --Sean >> >> >> No, it is not necessary, we only need to enable the clock for the firs= t user. >> >> I copy the clock behavior from kernel, >> >> but I agree that can be simpler. >> >> >> Amelie any notice about this point ? >> >> Do you prefer that I kept the behavior - same as kernel driver - or I = simplify the U-Boot driver ? >=20 > In case the PLL has not been disabled before Kernel boot, usbphyc Kerne= l driver will wait for the PLL pwerdown. > USB could also not being used in Kernel, so PLL would remain enabled, a= nd would waste power. > I am rather in favor of disabling the PLL. It should be disabled if clk_ignore_unused is not in the kernel parameter= s, as long as Linux is also aware of the clock. Generally, I would like to avoid refcounting if possible. Many U-Boot drivers do not disable their clocks (because they don't do any cleanup), so you can end up with the clock staying on anyway. --Sean > Regards, > Amelie >=20 >> >> >> Patrick >> >> >>> >>>> Signed-off-by: Patrick Delaunay >>>> --- >>>> >>>> =C2=A0 drivers/phy/phy-stm32-usbphyc.c | 76 +++++++++++++++++++++---= --------- >>>> =C2=A0 1 file changed, 48 insertions(+), 28 deletions(-) >>>> >>>> diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32= -usbphyc.c >>>> index 9c1dcfae52..16c8799eca 100644 >>>> --- a/drivers/phy/phy-stm32-usbphyc.c >>>> +++ b/drivers/phy/phy-stm32-usbphyc.c >>>> @@ -65,6 +65,7 @@ struct stm32_usbphyc { >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool init; >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool powered;= >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } phys[MAX_PHYS]; >>>> +=C2=A0=C2=A0=C2=A0 int n_pll_cons; >>>> =C2=A0 }; >>>> =C2=A0 =C2=A0 static void stm32_usbphyc_get_pll_params(u32 clk_rate,= >>>> @@ -124,18 +125,6 @@ static int stm32_usbphyc_pll_init(struct stm32_= usbphyc *usbphyc) >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; >>>> =C2=A0 } >>>> =C2=A0 -static bool stm32_usbphyc_is_init(struct stm32_usbphyc *usbp= hyc) >>>> -{ >>>> -=C2=A0=C2=A0=C2=A0 int i; >>>> - >>>> -=C2=A0=C2=A0=C2=A0 for (i =3D 0; i < MAX_PHYS; i++) { >>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (usbphyc->phys[i].ini= t) >>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 = return true; >>>> -=C2=A0=C2=A0=C2=A0 } >>>> - >>>> -=C2=A0=C2=A0=C2=A0 return false; >>>> -} >>>> - >>>> =C2=A0 static bool stm32_usbphyc_is_powered(struct stm32_usbphyc *us= bphyc) >>>> =C2=A0 { >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int i; >>>> @@ -148,18 +137,17 @@ static bool stm32_usbphyc_is_powered(struct st= m32_usbphyc *usbphyc) >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return false; >>>> =C2=A0 } >>>> =C2=A0 -static int stm32_usbphyc_phy_init(struct phy *phy) >>>> +static int stm32_usbphyc_pll_enable(struct stm32_usbphyc *usbphyc) >>>> =C2=A0 { >>>> -=C2=A0=C2=A0=C2=A0 struct stm32_usbphyc *usbphyc =3D dev_get_priv(p= hy->dev); >>>> -=C2=A0=C2=A0=C2=A0 struct stm32_usbphyc_phy *usbphyc_phy =3D usbphy= c->phys + phy->id; >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool pllen =3D readl(usbphyc->base + = STM32_USBPHYC_PLL) & PLLEN ? >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 true : false; >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int ret; >>>> =C2=A0 -=C2=A0=C2=A0=C2=A0 dev_dbg(phy->dev, "phy ID =3D %lu\n", phy= ->id); >>>> -=C2=A0=C2=A0=C2=A0 /* Check if one phy port has already configured = the pll */ >>>> -=C2=A0=C2=A0=C2=A0 if (pllen && stm32_usbphyc_is_init(usbphyc)) >>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 goto initialized; >>>> +=C2=A0=C2=A0=C2=A0 /* Check if one consumer has already configured = the pll */ >>>> +=C2=A0=C2=A0=C2=A0 if (pllen && usbphyc->n_pll_cons) { >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 usbphyc->n_pll_cons++; >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; >>>> +=C2=A0=C2=A0=C2=A0 } >>>> =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (usbphyc->vdda1v1) { >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ret =3D regul= ator_set_enable(usbphyc->vdda1v1, true); >>>> @@ -190,23 +178,19 @@ static int stm32_usbphyc_phy_init(struct phy *= phy) >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (!(readl(usbphyc->base + STM32_USB= PHYC_PLL) & PLLEN)) >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return -EIO; >>>> =C2=A0 -initialized: >>>> -=C2=A0=C2=A0=C2=A0 usbphyc_phy->init =3D true; >>>> +=C2=A0=C2=A0=C2=A0 usbphyc->n_pll_cons++; >>>> =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; >>>> =C2=A0 } >>>> =C2=A0 -static int stm32_usbphyc_phy_exit(struct phy *phy) >>>> +static int stm32_usbphyc_pll_disable(struct stm32_usbphyc *usbphyc)= >>>> =C2=A0 { >>>> -=C2=A0=C2=A0=C2=A0 struct stm32_usbphyc *usbphyc =3D dev_get_priv(p= hy->dev); >>>> -=C2=A0=C2=A0=C2=A0 struct stm32_usbphyc_phy *usbphyc_phy =3D usbphy= c->phys + phy->id; >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int ret; >>>> =C2=A0 -=C2=A0=C2=A0=C2=A0 dev_dbg(phy->dev, "phy ID =3D %lu\n", phy= ->id); >>>> -=C2=A0=C2=A0=C2=A0 usbphyc_phy->init =3D false; >>>> +=C2=A0=C2=A0=C2=A0 usbphyc->n_pll_cons--; >>>> =C2=A0 -=C2=A0=C2=A0=C2=A0 /* Check if other phy port requires pllen= */ >>>> -=C2=A0=C2=A0=C2=A0 if (stm32_usbphyc_is_init(usbphyc)) >>>> +=C2=A0=C2=A0=C2=A0 /* Check if other consumer requires pllen */ >>>> +=C2=A0=C2=A0=C2=A0 if (usbphyc->n_pll_cons) >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; >>>> =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 clrbits_le32(usbphyc->base + S= TM32_USBPHYC_PLL, PLLEN); >>>> @@ -235,6 +219,42 @@ static int stm32_usbphyc_phy_exit(struct phy *p= hy) >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; >>>> =C2=A0 } >>>> =C2=A0 +static int stm32_usbphyc_phy_init(struct phy *phy) >>>> +{ >>>> +=C2=A0=C2=A0=C2=A0 struct stm32_usbphyc *usbphyc =3D dev_get_priv(p= hy->dev); >>>> +=C2=A0=C2=A0=C2=A0 struct stm32_usbphyc_phy *usbphyc_phy =3D usbphy= c->phys + phy->id; >>>> +=C2=A0=C2=A0=C2=A0 int ret; >>>> + >>>> +=C2=A0=C2=A0=C2=A0 dev_dbg(phy->dev, "phy ID =3D %lu\n", phy->id); >>>> +=C2=A0=C2=A0=C2=A0 if (usbphyc_phy->init) >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; >>>> + >>>> +=C2=A0=C2=A0=C2=A0 ret =3D stm32_usbphyc_pll_enable(usbphyc); >>>> +=C2=A0=C2=A0=C2=A0 if (ret) >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return log_ret(ret); >>>> + >>>> +=C2=A0=C2=A0=C2=A0 usbphyc_phy->init =3D true; >>>> + >>>> +=C2=A0=C2=A0=C2=A0 return 0; >>>> +} >>>> + >>>> +static int stm32_usbphyc_phy_exit(struct phy *phy) >>>> +{ >>>> +=C2=A0=C2=A0=C2=A0 struct stm32_usbphyc *usbphyc =3D dev_get_priv(p= hy->dev); >>>> +=C2=A0=C2=A0=C2=A0 struct stm32_usbphyc_phy *usbphyc_phy =3D usbphy= c->phys + phy->id; >>>> +=C2=A0=C2=A0=C2=A0 int ret; >>>> + >>>> +=C2=A0=C2=A0=C2=A0 dev_dbg(phy->dev, "phy ID =3D %lu\n", phy->id); >>>> +=C2=A0=C2=A0=C2=A0 if (!usbphyc_phy->init) >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0; >>>> + >>>> +=C2=A0=C2=A0=C2=A0 ret =3D stm32_usbphyc_pll_disable(usbphyc); >>>> + >>>> +=C2=A0=C2=A0=C2=A0 usbphyc_phy->init =3D false; >>>> + >>>> +=C2=A0=C2=A0=C2=A0 return log_ret(ret); >>>> +} >>>> + >>>> =C2=A0 static int stm32_usbphyc_phy_power_on(struct phy *phy) >>>> =C2=A0 { >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct stm32_usbphyc *usbphyc =3D dev= _get_priv(phy->dev); >>>> >>>