From mboxrd@z Thu Jan  1 00:00:00 1970
From: =?iso-8859-1?Q?Br=FCns=2C_Stefan?= <Stefan.Bruens@rwth-aachen.de>
Date: Mon, 3 Apr 2017 14:43:41 +0000
Subject: [U-Boot] usb: dwc2: invalidate the dcache before starting the
	DMA
In-Reply-To: <20170401065139.12084-1-eddie.cai.linux@gmail.com>
References: <20170401065139.12084-1-eddie.cai.linux@gmail.com>
Message-ID: <7851308.6iHcp38Qv5@sbruens-linux>
List-Id: <u-boot.lists.denx.de>
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To: u-boot@lists.denx.de

On Samstag, 1. April 2017 08:51:39 CEST Eddie Cai wrote:
> We should invalidate the dcache before starting the DMA. In case there are
> any dirty lines from the DMA buffer in the cache, subsequent cache-line
> replacements may corrupt the buffer in memory while the DMA is still going
> on. Cache-line replacement can happen if the CPU tries to bring some other
> memory locations into the cache while the DMA is going on.
>=20
> Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>

Can you please run the patch through checkpatch, I can at least spot some=20
missing whitespace.

You can add my

Reviewed-by: Stefan Br=C3=BCns <stefan.bruens@rwth-aachen.de>

to your v2.

Kind regards,

Stefan

> ---
>  drivers/usb/host/dwc2.c | 17 +++++++++++------
>  1 file changed, 11 insertions(+), 6 deletions(-)
>=20
> diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
> index 5ac602e..a151ba6 100644
> --- a/drivers/usb/host/dwc2.c
> +++ b/drivers/usb/host/dwc2.c
> @@ -811,12 +811,17 @@ static int transfer_chunk(struct dwc2_hc_regs
> *hc_regs, void *aligned_buffer, (*pid << DWC2_HCTSIZ_PID_OFFSET),
>  	       &hc_regs->hctsiz);
>=20
> -	if (!in && xfer_len) {
> -		memcpy(aligned_buffer, buffer, xfer_len);
> -
> -		flush_dcache_range((unsigned long)aligned_buffer,
> -				   (unsigned long)aligned_buffer +
> -				   roundup(xfer_len, ARCH_DMA_MINALIGN));
> +	if (xfer_len) {
> +		if(in){
> +			invalidate_dcache_range((unsigned long)aligned_buffer,
> +					   (unsigned long)aligned_buffer +
> +					   roundup(xfer_len, ARCH_DMA_MINALIGN));
> +		}else{
> +			memcpy(aligned_buffer, buffer, xfer_len);
> +			flush_dcache_range((unsigned long)aligned_buffer,
> +					   (unsigned long)aligned_buffer +
> +					   roundup(xfer_len, ARCH_DMA_MINALIGN));
> +		}
>  	}
>=20
>  	writel(phys_to_bus((unsigned long)aligned_buffer), &hc_regs->hcdma);