From mboxrd@z Thu Jan 1 00:00:00 1970 From: vinay hegde Date: Wed, 7 Apr 2010 11:41:20 +0530 (IST) Subject: [U-Boot] Regarding P2020 core 1 Message-ID: <791932.31915.qm@web7707.mail.in.yahoo.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi All, We are coming up with a new platform that uses Freescale P2020 processor and P2020 U-Boot. In this platform, we will be using only one core (core 0) of P2020 and will be disabling the core 1 (thro, some hardware strapping as hardware folks told me). If anybody has already investigated and knows how to disable core 1 (and support only core 0) in P2020 U-Boot (or in general, say mpc8572), please let me know. Any pointers will be very useful. Thanks Vinay