From: Thomas Schaefer <Thomas.Schaefer@kontron.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/2] drivers/spi: fsl_qspi: improve timeout calculation
Date: Tue, 2 Jul 2019 11:43:13 +0000 [thread overview]
Message-ID: <7982fe35cb0240b4a4a441fa34dd18f0@kontron.com> (raw)
In-Reply-To: <CAMty3ZCPU5J6ayCHLWPXpBJ=SGcav5Nc3cagvKreXq6fX9n8xA@mail.gmail.com>
> Von: Jagan Teki <jagan@amarulasolutions.com>
> Gesendet: Dienstag, 2. Juli 2019 13:12
>
> On Mon, Jul 1, 2019 at 9:07 PM Thomas Schaefer <thomas.schaefer@kontron.com> wrote:
> >
> > Use readl_poll_timeout instead of explicit calculation
> >
> > Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
> > ---
> > drivers/spi/fsl_qspi.c | 17 ++++++-----------
> > 1 file changed, 6 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index
> > 2c5937509f..41abe1996f 100644
> > --- a/drivers/spi/fsl_qspi.c
> > +++ b/drivers/spi/fsl_qspi.c
> > @@ -10,6 +10,7 @@
> > #include <spi.h>
> > #include <asm/io.h>
> > #include <linux/sizes.h>
> > +#include <linux/iopoll.h>
> > #include <dm.h>
> > #include <errno.h>
> > #include <watchdog.h>
> > @@ -150,19 +151,13 @@ static void qspi_write32(u32 flags, u32 *addr,
> > u32 val) static inline int is_controller_busy(const struct
> > fsl_qspi_priv *priv) {
> > u32 val;
> > - const u32 mask = QSPI_SR_BUSY_MASK | QSPI_SR_AHB_ACC_MASK |
> > - QSPI_SR_IP_ACC_MASK;
> > - unsigned long timeout = timer_get_us() + 1000;
> > + u32 mask = QSPI_SR_BUSY_MASK | QSPI_SR_AHB_ACC_MASK |
> > + QSPI_SR_IP_ACC_MASK;
> >
> > - do {
> > - val = qspi_read32(priv->flags, &priv->regs->sr);
> > + if (priv->flags & QSPI_FLAG_REGMAP_ENDIAN_BIG)
> > + mask = (u32)cpu_to_be32(mask);
>
> This look like a BE check, which was not there before isn't it?
>
Hi Jagan,
The previous implementation was using the qspi_read32 function, that
implemented this endianess checking. As the readl_poll_timeout macro finally
ends with
#define __arch_getl(a) (*(volatile unsigned int *)(a))
in arch/arm/include/asm/io.h. When swapping the 'mask' in case of BE, the
result is the same as when using qspi_read32 before.
However, I did not test this as the QSPI_FLAG_REGMAP_ENDIAN_BIG is not set
on i.MX7 systems.
Also I found that current linux kernel does this BE check (negated LE check)
with the 'mask' variable in drivers/spi/spi-fsl-qspi.c
if (!q->devtype_data->little_endian)
mask = (u32)cpu_to_be32(mask);
Best reards,
Thomas
next prev parent reply other threads:[~2019-07-02 11:43 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-01 15:37 [U-Boot] Fix read error in fsl_qspi driver Thomas Schaefer
2019-07-01 15:37 ` [U-Boot] [PATCH 1/2] drivers/spi: fsl_qspi: fix read timeout Thomas Schaefer
2019-07-01 15:40 ` Fabio Estevam
2019-07-02 11:01 ` Jagan Teki
2019-07-01 15:37 ` [U-Boot] [PATCH 2/2] drivers/spi: fsl_qspi: improve timeout calculation Thomas Schaefer
2019-07-01 15:41 ` Fabio Estevam
2019-07-02 11:11 ` Jagan Teki
2019-07-02 11:43 ` Thomas Schaefer [this message]
2019-07-03 8:40 ` Jagan Teki
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