From: Maksim Kiselev <bigunclemax@gmail.com>
To: Sam Edwards <cfsworks@gmail.com>,
Andre Przywara <andre.przywara@arm.com>
Cc: u-boot@lists.denx.de
Subject: Re: [RFC PATCH 4/4] sunxi: psci: implement PSCI on R528
Date: Fri, 2 Jun 2023 23:53:14 +0300 [thread overview]
Message-ID: <8031631f-6a0a-72fa-47da-1bc4f557fdb8@gmail.com> (raw)
In-Reply-To: <20230601214814.128336-5-CFSworks@gmail.com>
Hi, Sam,
Thank you for this series!
I tested it on my T113s board and got the second core worked.
Here is some kernel log:
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: Using PSCI v0.1 Function IDs from DT
[ 0.120000] CPU: Testing write buffer coherency: ok
[ 0.120000] /cpus/cpu@0 missing clock-frequency property
[ 0.120000] /cpus/cpu@1 missing clock-frequency property
[ 0.120000] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.120000] Setting up static identity map for 0x40100000 - 0x40100060
[ 0.120000] rcu: Hierarchical SRCU implementation.
[ 0.120000] rcu: Max phase no-delay instances is 1000.
[ 0.120000] smp: Bringing up secondary CPUs ...
[ 0.170000] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.180000] smp: Brought up 1 node, 2 CPUs
[ 0.180000] SMP: Total of 2 processors activated (1149.33 BogoMIPS).
[ 0.180000] CPU: All CPU(s) started in SVC mode.
Tested-by: Maksim Kiselev <bigunclemax@gmail.com>
prev parent reply other threads:[~2023-06-02 20:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-01 21:48 [RFC PATCH 0/4] Allwinner R528/T113s PSCI Sam Edwards
2023-06-01 21:48 ` [RFC PATCH 1/4] SQUASH ME Sam Edwards
2023-06-01 21:48 ` [RFC PATCH 2/4] sunxi: psci: clean away preprocessor macros Sam Edwards
2023-06-01 21:48 ` [RFC PATCH 3/4] sunxi: psci: refactor register access to separate functions Sam Edwards
2023-06-01 21:48 ` [RFC PATCH 4/4] sunxi: psci: implement PSCI on R528 Sam Edwards
2023-06-02 20:53 ` Maksim Kiselev [this message]
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