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From: "Chee, Tien Fong" <tienfong.chee@altera.com>
To: alif.zakuan.yuslaimi@altera.com, u-boot@lists.denx.de
Cc: Marek Vasut <marex@nabladev.com>,
	Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>,
	Tien Fong Chee <tien.fong.chee@altera.com>,
	Peng Fan <peng.fan@nxp.com>,
	Jaehoon Chung <jh80.chung@samsung.com>,
	Jan Kiszka <jan.kiszka@siemens.com>,
	Brian Sune <briansune@gmail.com>
Subject: Re: [PATCH v1 6/8] configs: cyclone5: Enable SPL FAT support
Date: Mon, 1 Dec 2025 11:08:35 +0800	[thread overview]
Message-ID: <8068f275-97ce-466a-ae80-8ecea788ee21@altera.com> (raw)
In-Reply-To: <20251125081316.17329-7-alif.zakuan.yuslaimi@altera.com>


On 25/11/2025 4:13 pm, alif.zakuan.yuslaimi@altera.com wrote:
> From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
>
> Enable support for FAT filesystem with SPL for CycloneV instead of raw
> mode.
>
> Recent changes breaks CycloneV MMC boot from raw mode, and so we are taking
> this opportunity to migrate MMC boot mode to FAT as smaller OCRAM size is
> required, as well as aligning MMC boot flow with our other devices.
>
> Fixes: 2a00d73d081a1 ("spl: mmc: Try to clean up raw-mode options")
>
> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
> ---
>   configs/socfpga_cyclone5_defconfig | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
> index 2bec82b0625..2b2435a27bb 100644
> --- a/configs/socfpga_cyclone5_defconfig
> +++ b/configs/socfpga_cyclone5_defconfig
> @@ -12,6 +12,7 @@ CONFIG_DM_RESET=y
>   CONFIG_SPL_STACK=0x0
>   CONFIG_SPL_TEXT_BASE=0xFFFF0000
>   CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
> +CONFIG_SPL_FS_FAT=y
>   CONFIG_TIMESTAMP=y
>   CONFIG_FIT=y
>   CONFIG_DISTRO_DEFAULTS=y
> @@ -27,6 +28,7 @@ CONFIG_SPL_PAD_TO=0x10000
>   CONFIG_SPL_NO_BSS_LIMIT=y
>   # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>   CONFIG_SPL_HAVE_INIT_STACK=y
> +# CONFIG_SPL_SYS_MMCSD_RAW_MODE is not set
>   CONFIG_SPL_SPI_LOAD=y
>   CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
>   CONFIG_SYS_MAXARGS=32


Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>

Best regards,
Tien Fong


  parent reply	other threads:[~2025-12-01  3:08 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-25  8:13 [PATCH v1 0/8]SoCFPGA: Update Boot Support for CycloneV in U-Boot alif.zakuan.yuslaimi
2025-11-25  8:13 ` [PATCH v1 1/8] configs: cyclone5: Disable mkeficapsule tool build alif.zakuan.yuslaimi
2025-12-01  3:06   ` Chee, Tien Fong
2025-11-25  8:13 ` [PATCH v1 2/8] arm: Fix "file truncated" linker errors from empty built-in.a in SPL/TPL/VPL builds alif.zakuan.yuslaimi
2025-11-25 12:23   ` Marek Vasut
2025-11-27  2:12     ` Yuslaimi, Alif Zakuan
2025-11-27 15:09       ` Marek Vasut
2025-11-28  2:11         ` Yuslaimi, Alif Zakuan
2025-11-28 15:31           ` Tom Rini
2025-11-28 16:20             ` Sune Brian
2025-11-28 16:44             ` Ilias Apalodimas
2025-11-28 16:49               ` Tom Rini
2025-11-29  0:46                 ` Sune Brian
2025-12-01 16:44                   ` Tom Rini
2025-12-01 16:52                     ` Sune Brian
2025-12-01 16:54                       ` Tom Rini
2025-12-01 17:07                         ` Sune Brian
2025-12-01 17:09                           ` Tom Rini
2025-12-01 17:59                             ` Sune Brian
2025-12-01 18:27                               ` Tom Rini
2025-12-01 18:37                                 ` Sune Brian
2025-12-01 18:38                                   ` Tom Rini
2025-12-01 18:48                                     ` Sune Brian
2025-12-01 19:10                                     ` Sune Brian
2025-12-02  7:55                 ` Ilias Apalodimas
2025-12-02  8:02                   ` Sune Brian
2025-12-02  8:53                     ` Ilias Apalodimas
2025-12-02  8:59                       ` Sune Brian
2025-12-03  6:46                         ` Yuslaimi, Alif Zakuan
2025-12-03  6:54                           ` Sune Brian
2025-11-25  8:13 ` [PATCH v1 3/8] configs: cyclone5: Enable random MAC address alif.zakuan.yuslaimi
2025-11-25 12:23   ` Marek Vasut
2025-11-27  2:14     ` Yuslaimi, Alif Zakuan
2025-11-25  8:13 ` [PATCH v1 4/8] mmc: socfpga_dw_mmc: Restore legacy clkmgr address retrieval alif.zakuan.yuslaimi
2025-11-25 12:24   ` Marek Vasut
2025-11-27  2:21     ` Yuslaimi, Alif Zakuan
2025-12-01  3:07   ` Chee, Tien Fong
2025-11-25  8:13 ` [PATCH v1 5/8] spl: Remove ARCH_SOCFPGA from MMC raw mode enablement alif.zakuan.yuslaimi
2025-12-01  3:08   ` Chee, Tien Fong
2025-11-25  8:13 ` [PATCH v1 6/8] configs: cyclone5: Enable SPL FAT support alif.zakuan.yuslaimi
2025-11-25  9:41   ` Jan Kiszka
2025-11-25  9:44     ` Jan Kiszka
2025-11-27  4:34       ` Chee, Tien Fong
2025-11-27  4:32     ` Chee, Tien Fong
2025-11-27  6:37       ` Jan Kiszka
2025-11-27  6:48         ` Sune Brian
2025-11-27  7:05           ` Jan Kiszka
2025-11-27  7:20             ` Sune Brian
2025-11-27  7:29               ` Jan Kiszka
2025-11-27  7:39                 ` Sune Brian
2025-11-27  7:50                   ` Jan Kiszka
2025-11-27  7:56                     ` Sune Brian
2025-11-27  8:22                       ` Jan Kiszka
2025-11-27  9:42                         ` Sune Brian
2025-11-27 17:42                           ` Jan Kiszka
2025-11-27 17:48                             ` Sune Brian
2025-12-01  3:08   ` Chee, Tien Fong [this message]
2025-11-25  8:13 ` [PATCH v1 7/8] configs: cyclone5: Update boot command for CycloneV alif.zakuan.yuslaimi
2025-12-01  3:10   ` Chee, Tien Fong
2025-11-25  8:13 ` [PATCH v1 8/8] configs: cyclone5: Disable SPI in SPL alif.zakuan.yuslaimi
2025-12-01  3:10   ` Chee, Tien Fong

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