From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter.Chubb at data61.csiro.au Date: Thu, 8 Jun 2017 04:03:29 +0000 Subject: [U-Boot] [PATCH] tegra: mmc: Set the bus width correctly In-Reply-To: <20170608031148.21101-1-sjg@chromium.org> References: <20170608031148.21101-1-sjg@chromium.org> Message-ID: <84mv9junvy.wl-Peter.Chubb@data61.csiro.au> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de >>>>> "Simon" == Simon Glass writes: Simon> The driver currently does not reset bit 5 of the hostctl Simon> register even if the MMC stack requests it. Then means that Simon> once a bus width of 8 is selected it is not possible to change Simon> it back to 1. This breaks 'mmc rescan' which needs to start off Simon> with a bus width of 1. Simon> The problem was surfaced by enabling CONFIG_DM_MMC_OPS on Simon> tegra. Without this option the MMC stack fully reinits the Simon> driver on a 'mmc rescan'. But with this option driver model Simon> does not re-probe a driver once it has been probed once. Simon> Fix the driver to honour the request. Simon> Signed-off-by: Simon Glass --- Tested-by: Peter Chubb Simon> drivers/mmc/tegra_mmc.c | 2 +- 1 file changed, 1 insertion(+), Simon> 1 deletion(-) Simon> diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c Simon> index 338e42b528..7d945a172e 100644 --- Simon> a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ Simon> -438,7 +438,7 @@ static int tegra_mmc_set_ios(struct udevice Simon> *dev) else if (mmc->bus_width == 4) ctrl |= (1 << 1); else - Simon> ctrl &= ~(1 << 1); + ctrl &= ~(1 << 1 | 1 << 5); Simon> writeb(ctrl, &priv->reg->hostctl); debug("mmc_set_ios: Simon> hostctl = %08X\n", ctrl); -- 2.13.0.506.g27d5fe0cd-goog Simon> -- Dr Peter Chubb Tel: +61 2 9490 5852 http://ts.data61.csiro.au/ Trustworthy Systems Group Data61 (formerly NICTA)