From: Marc Zyngier <maz@kernel.org>
To: Caleb Connolly <caleb.connolly@linaro.org>
Cc: "Andre Przywara" <andre.przywara@arm.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Patrick Rudolph" <patrick.rudolph@9elements.com>,
"Peter Hoyes" <Peter.Hoyes@arm.com>,
"Pierre-Clément Tosi" <ptosi@google.com>,
"Simon Glass" <sjg@chromium.org>,
"Sumit Garg" <sumit.garg@linaro.org>,
"Tom Rini" <trini@konsulko.com>,
u-boot-qcom@groups.io,
"Ilias Apalodimas" <ilias.apalodimas@linaro.org>,
u-boot@lists.denx.de
Subject: Re: [PATCH] armv8: mmu: don't switch to emergency tlb when adding a dynamic mapping
Date: Wed, 08 Jan 2025 15:05:04 +0000 [thread overview]
Message-ID: <86septwdlr.wl-maz@kernel.org> (raw)
In-Reply-To: <20250108142235.1194640-1-caleb.connolly@linaro.org>
On Wed, 08 Jan 2025 14:22:24 +0000,
Caleb Connolly <caleb.connolly@linaro.org> wrote:
>
> This seems to cause crashes on a bunch of Qualcomm platforms. It's safer
> to just update the live table and flush it.
You may want to provide a bit more information, because that's not
much to go on, really.
>
> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
> ---
> arch/arm/cpu/armv8/cache_v8.c | 11 ++---------
> arch/arm/include/asm/system.h | 3 +--
> drivers/soc/qcom/cmd-db.c | 2 +-
> 3 files changed, 4 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
> index e6be6359c5d9..43051d156122 100644
> --- a/arch/arm/cpu/armv8/cache_v8.c
> +++ b/arch/arm/cpu/armv8/cache_v8.c
> @@ -338,9 +338,9 @@ static void map_range(u64 virt, u64 phys, u64 size, int level,
> size -= next_size;
> }
> }
>
> -void mmu_map_region(phys_addr_t addr, u64 size, bool emergency)
> +void mmu_map_region(phys_addr_t addr, u64 size)
> {
> u64 va_bits;
> int level = 0;
> u64 attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE;
> @@ -350,19 +350,12 @@ void mmu_map_region(phys_addr_t addr, u64 size, bool emergency)
> get_tcr(NULL, &va_bits);
> if (va_bits < 39)
> level = 1;
>
> - if (emergency)
> - map_range(addr, addr, size, level,
> - (u64 *)gd->arch.tlb_emerg, attrs);
> -
> - /* Switch pagetables while we update the primary one */
> - __asm_switch_ttbr(gd->arch.tlb_emerg);
> -
> map_range(addr, addr, size, level,
> (u64 *)gd->arch.tlb_addr, attrs);
>
> - __asm_switch_ttbr(gd->arch.tlb_addr);
> + flush_dcache_range(gd->arch.tlb_addr, gd->arch.tlb_size);
Why would you invalidate anything when *mapping* something? By
definition, if there was nothing mapped before, there is nothing to
invalidate (hint: the architecture forbids negative caching).
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2025-01-08 15:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-08 14:22 [PATCH] armv8: mmu: don't switch to emergency tlb when adding a dynamic mapping Caleb Connolly
2025-01-08 15:05 ` Marc Zyngier [this message]
2025-01-08 15:19 ` Caleb Connolly
2025-01-08 15:42 ` Marc Zyngier
2025-01-08 16:07 ` Caleb Connolly
2025-01-10 14:20 ` Neil Armstrong
2025-01-08 15:52 ` Pierre-Clément Tosi
2025-01-14 8:38 ` Ahmad Fatoum
2025-01-14 8:55 ` Marc Zyngier
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