From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3407AC61DA4 for ; Thu, 2 Feb 2023 17:58:21 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id EBA8085CE8; Thu, 2 Feb 2023 18:58:18 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="QoKLFcxb"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 01D5785D0B; Thu, 2 Feb 2023 18:58:18 +0100 (CET) Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9445585CE3 for ; Thu, 2 Feb 2023 18:58:15 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=jbx6244@gmail.com Received: by mail-ej1-x629.google.com with SMTP id p26so8186165ejx.13 for ; Thu, 02 Feb 2023 09:58:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:content-language:cc:to:subject:from :user-agent:mime-version:date:message-id:from:to:cc:subject:date :message-id:reply-to; bh=tHdPnSbOACNyUcynTwFWv8j4GpCVGX01Ipo1zRFp5I4=; b=QoKLFcxbQ5WwnZXrAbGXOrSF1yBQAXDYYEtmaywLteeuqpL93tZs4EIA/ilNPUFhsp LvEcoUUeiiceNBHLZbqUhcADKqo7ReHbhoKtlzUiYDc8i5UDKvxmTrLVSh7GoKcbjczW a9MGIhRzlMzNhHKaj1RbSYPhq5RN3JHFk09U8cP9az/KiOxZlnr35yMF62N8DyD1aFKN Cg8YaNzgWQJiDNZGzoupWUUf9aA5v0cNURraltSrFgqQGFLUn/0tsH+81WZv7uQEXK3u 0SD1Vm7Z8v9FCm2C90P+mr2HLFmVcy82drQzZuWv4VLeOTMiYucLuAsbJwcjManR5UFn b2lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:content-language:cc:to:subject:from :user-agent:mime-version:date:message-id:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=tHdPnSbOACNyUcynTwFWv8j4GpCVGX01Ipo1zRFp5I4=; b=7BkaOtEtmshupsSwiUTzSpfSqbVISjKH3WSAhZOl/RJArtDrdZdngw0pyruTHHu0+M YKUiW5VRoBSjOif15JsggcPhjYXD3640frXjTBkbyMSj4NBAWaFTDuy4m/mByt73kEoN ekACG3QMCLo3RhC/DU4x7BOlOZoL/OzeocCvAp2ILxLfBcHgZyrqsrOpbMT8UEkVf7A5 l3FDbdmrS5bPTF+KJ6n+DkFrVwWwDVZ3z9yXt80DkUfMOohUzvTumnKaW21uIxZqg9XC 6fid7WqLMt+agiWAYfXxxVP6JVCRIY3Z476sdkSdFS2867Rp/vYrqEvEvO+ZOk7lHoTC 5vDQ== X-Gm-Message-State: AO0yUKW6oOKQVX6zt3RMWO11kHDGjRuHWx4FKSNGQpSZ7dUEKGNApUMn lgmM21V6Lh5UTrT2h0yIRXI= X-Google-Smtp-Source: AK7set+kSS2PKN7OIh4Tv2m1CdKWouQ2EZV/onC3TsEAp9YTxcGyXW4DLQr1jFyGPj1aTqjx1dhjaQ== X-Received: by 2002:a17:906:6d42:b0:878:5e84:e1da with SMTP id a2-20020a1709066d4200b008785e84e1damr6270401ejt.27.1675360695200; Thu, 02 Feb 2023 09:58:15 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id hz19-20020a1709072cf300b008847d7ed37bsm102450ejc.100.2023.02.02.09.58.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 02 Feb 2023 09:58:14 -0800 (PST) Message-ID: <873cd740-1909-f0d3-5fef-ff033aed558e@gmail.com> Date: Thu, 2 Feb 2023 18:58:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [RFC PATCH v1 1/2] include: fdtdec: decouple fdt_addr_t and phys_addr_t size To: trini@konsulko.com, dario.binacchi@amarulasolutions.com, michael@amarulasolutions.com Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com, u-boot@lists.denx.de Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean The DT specification supports CPUs with both 32-bit and 64-bit addressing capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions with a 64-bit reg property. These partitions synced from Linux end up with the wrong offset and sizes when only the lower 32-bit is passed. Decouple the fdt_addr_t and phys_addr_t size as they don't necessary match. Signed-off-by: Johan Jonker --- Note for Tom Rini or others: fdt_addr_t is referenced in 230 files and fdt_size_t in 50 files. Most drivers mix up FDT and CPU capabilities. Please advise how to move forward with proper DT parsing. --- This is related to a possible future serie of bug fixes for the Rockchip nfc driver. --- Kconfig | 8 ++++++++ include/fdtdec.h | 8 +++++--- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/Kconfig b/Kconfig index a75cce7e..8101f1a6 100644 --- a/Kconfig +++ b/Kconfig @@ -422,11 +422,19 @@ endif # EXPERT config PHYS_64BIT bool "64bit physical address support" + select FDT_64BIT help Say Y here to support 64bit physical memory address. This can be used not only for 64bit SoCs, but also for large physical address extension on 32bit SoCs. +config FDT_64BIT + bool "64bit fdt address support" + help + Say Y here to support 64bit fdt memory address. + This can be used not only for 64bit SoCs, but also for + large physical address extension on 32bit SoCs. + config HAS_ROM bool select BINMAN diff --git a/include/fdtdec.h b/include/fdtdec.h index 12355afd..0adde92a 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -21,12 +21,12 @@ * A typedef for a physical address. Note that fdt data is always big * endian even on a litle endian machine. */ -typedef phys_addr_t fdt_addr_t; -typedef phys_size_t fdt_size_t; #define FDT_SIZE_T_NONE (-1U) -#ifdef CONFIG_PHYS_64BIT +#ifdef CONFIG_FDT_64BIT +typedef u64 fdt_addr_t; +typedef u64 fdt_size_t; #define FDT_ADDR_T_NONE ((ulong)(-1)) #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) @@ -35,6 +35,8 @@ typedef phys_size_t fdt_size_t; #define cpu_to_fdt_size(reg) cpu_to_be64(reg) typedef fdt64_t fdt_val_t; #else +typedef u32 fdt_addr_t; +typedef u32 fdt_size_t; #define FDT_ADDR_T_NONE (-1U) #define fdt_addr_to_cpu(reg) be32_to_cpu(reg) -- 2.20.1