From mboxrd@z Thu Jan  1 00:00:00 1970
From: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Date: Fri, 23 Oct 2020 10:51:15 +0200
Subject: [patch 3/8] RFC: drivers/video/rockchip/rk_edp.c: Change
 interrupt polarity configuration
In-Reply-To: <a7d2bca3-ac34-6af4-11a8-9153ba26ebd4@gmail.com> (Alper Nebi
 Yasak's message of "Thu, 22 Oct 2020 21:39:29 +0300")
References: <20200925183654.723338620@rtp-net.org>
 <20200925183856.447902421@rtp-net.org>
 <a7d2bca3-ac34-6af4-11a8-9153ba26ebd4@gmail.com>
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Alper Nebi Yasak <alpernebiyasak@gmail.com> writes:

> On 25/09/2020 21:36, Arnaud Patard (Rtp) wrote:
>> The linux code is setting polarity configuration to 3 but
>> uboot code is setting it to 1. Change the configuration to match the
>> linux configuration
> FYI, coreboot does the same as existing code, but Linux support for this
> is bound to be better than both coreboot and U-Boot.
>
>> 
>> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
>> Index: u-boot/drivers/video/rockchip/rk_edp.c
>> ===================================================================
>> --- u-boot.orig/drivers/video/rockchip/rk_edp.c
>> +++ u-boot/drivers/video/rockchip/rk_edp.c
>> @@ -100,10 +100,13 @@ static void rk_edp_init_refclk(struct rk
>>  	       &regs->dp_reserv2);
>>  }
>>  
>> +#define INT_POL1                                (0x1 << 1)
>> +#define INT_POL0                                (0x1 << 0)
>> +
>
> INT_POL is defined at arch/arm/include/asm/arch-rockchip/edp_rk3288.h,
> so these would probably go there.
>

I've been wondering were to put them tbh. I'll move them to edp_rk3288.h
then.

Arnaud