Re: [PATCH] armv8: mmu: don't switch to emergency tlb when adding a dynamic mapping

[Marc Zyngier <maz@kernel.org>]

On Tue, 14 Jan 2025 08:38:48 +0000,
Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:
> 
> Hi Pierre,
> 
> On 08.01.25 16:52, Pierre-Clément Tosi wrote:
> > Hi Caleb,
> > 
> > On Wed, Jan 08, 2025 at 04:19:07PM +0100, Caleb Connolly wrote:
> >> Hi Marc,
> >>
> >> Thanks for your comments.
> >>
> >> On 08/01/2025 16:05, Marc Zyngier wrote:
> >>> On Wed, 08 Jan 2025 14:22:24 +0000,
> >>> Caleb Connolly <caleb.connolly@linaro.org> wrote:
> >>>>
> >>>> This seems to cause crashes on a bunch of Qualcomm platforms. It's safer
> >>>> to just update the live table and flush it.
> >>>
> >>> You may want to provide a bit more information, because that's not
> >>> much to go on, really.
> >>
> >> Best I have is "the board hangs and then resets when trying to switch
> >> pagetables", I didn't manage to narrow it down exactly, but since it
> >> seems to work to update the tables without switching that feels like a
> >> better approach at least for now.
> >>
> >> In hindsight, this mmu_map_region() function is not great in a lot of
> >> ways, I'm still getting my head around the MMU and I expect this will
> >> keep being improved.
> > 
> > Yes, [1] should not have used map_range() on live PTs as it assumes that
> > 
> > 1. the PTs it modifies aren't live so doesn't perform Break Before Make;
> 
> Quoting ARM ARM (L.a) D8.17.1 "Using break-before-make when updating translation
> table entries":
> 
>   If multiple execution threads use the same translation tables, then when a
>   translation table entry is modified in one or more of the following ways,
>   the architecture requires software to use a break-before-make sequence: [...]
> 
> So I am wondering: Does the break-before-make requirement even apply to a
> single-threaded software like U-Boot?

Yes, this equally applies, as the page-table walker is a separate
agent in the system, and can *speculatively* walk page tables any time
it wants. These walks are allowed to be cached as TLBs, and this can
result in a single VA translating to multiple PAs.

Don't do that.

	M.

-- 
Without deviation from the norm, progress is not possible.